Formal verification : an essential toolkit for modern VLSI design /

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Formal Verification: An Essential Toolkit for Modern VLSI Design, Second Edition presents practical approaches for design and validation, with hands-on advice to help working engineers integrate these techniques into their work. Formal Verification (FV) enables a designer to directly analyze and mat...

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Détails bibliographiques
Cote:Libro Electrónico
Auteurs principaux: Seligman, Erik (Auteur), Schubert, E. Thomas, 1959- (Auteur), Kumar, M. V. Achutha Kiran (Auteur)
Format: Électronique eBook
Langue:Inglés
Publié: Cambridge, MA : Morgan Kaufmann, [2023]
Édition:Second edition.
Sujets:
Electronic circuits > Testing.
Integrated circuits > Very large scale integration > Design and construction.
Verilog (Computer hardware description language)
Verilog (Langage de description de matériel informatique)
Electronic circuits > Testing
Integrated circuits > Very large scale integration > Design and construction
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