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High-Level Synthesis from Algorithm to Digital Circuit /
The successful usage of Hardware Description Languages like VHDL and Verilog in design flows is mainly due to the availability of efficient synthesis methods and tools that enable the translation of RTL designs into optimized gate-level implementations. Many expect that the same approach could be ef...
| Cote: | Libro Electrónico |
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| Collectivité auteur: | |
| Autres auteurs: | , |
| Format: | Électronique eBook |
| Langue: | Inglés |
| Publié: |
Dordrecht :
Springer Netherlands : Imprint: Springer,
2008.
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| Édition: | 1st ed. 2008. |
| Sujets: | |
| Accès en ligne: | Texto Completo |