Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) r...
Cote: | Libro Electrónico |
---|---|
Auteurs principaux: | , , , |
Collectivité auteur: | |
Format: | Électronique eBook |
Langue: | Inglés |
Publié: |
New York, NY :
Springer US : Imprint: Springer,
2008.
|
Édition: | 1st ed. 2008. |
Sujets: | |
Accès en ligne: | Texto Completo |