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CMOS : front-end electronics for radiation sensors /

Detalles Bibliográficos
Autor principal: Rivetti, Angelo (Autor)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: [Place of publication not identified] : CRC Press, 2018.
Colección:Devices, circuits, and systems ; 42
Temas:
Acceso en línea:Texto completo (Requiere registro previo con correo institucional)
Descripción
Notas:<P>Preface</P><P>Acknowledgments</P><P>List of Tables</P><P>About the Author</P><B><P>Front-End Specifications and Architecture Overview</P></B><P>Basic Features and Electrical Modeling of Radiation Sensors</P><I><P>Signal Formation in Detectors</P><P>Signal Polarity</P><P>Space Resolution and Detector Segmentation</P><P>Amplitude and Signal Shape Fluctuations</P><P>Sensor Capacitance</P><P>Leakage Current</P><P>Sensor Equivalent Circuit</P><P>Modeling of Composite Systems</P></I><P>Examples of Radiation Sensors</P><P>Key Parameters in Front-End Electronics</P><I><P>A First Front-End Amplifier</P><P>Peaking Time</P><P>Gain and Signal Polarity</P><P>Noise</P><P>Time Resolution</P><P>Pile-Up</P><P>Detection Efficiency and Derandomization</P></I><P>Front-End Architectures</P><I><P>Binary Front-End</P><P>Counting and Time-Over-Threshold Architectures</P><P>Time Pick-Off Systems</P><P>Sample and Hold and Peak Detectors</P><P>Analog Memories</P><P>Real Time Waveform Digitizers</P><P>Data Readout and Transmission</P></I><P>References</P><B><P>MOS Transistor Properties</P></B><P>Silicon Properties</P><I><P>Silicon Band Structure</P><P>Doping</P></I><P>Charge Transport in Silicon</P><I><P>Charge Transport by Drift</P><P>Mobility in Doped Silicon</P><P>Charge Transport by Diffusion</P><P>Einstein Relationship</P><P>Graded Doping</P></I><P>pn Junctions</P><I><P>Built-In Voltage</P><P>Depletion Region</P><P>Breakdown Voltage</P><P>Junction Capacitance</P><P>Contact Potentials</P></I><P>A First Look at MOS Transistors</P><I><P>The NMOS Transistors</P><P>The PMOS Transistors</P><P>Transistor Representations</P></I><P>CMOS Technologies</P><I><P>CMOS Radiation Sensors</P></I><P>Electrical Characteristics of MOS Transistors</P><I><P>The Threshold Voltage</P><P>Regions of Operation of the MOS Transistor</P><P>MOS Characteristics in the Linear Region</P><P>MOS Characteristics in Saturation</P><P>The Body Effect </P><P>MOS Capacitance </P><P>The PMOS Transistor</P></I><P>MOS Small Signal Parameters</P><I><P>Gate Transconductance</P><P>Bulk Transconductance</P><P>Output Conductance</P><P>MOS Small Signal Model</P></I><P>Weak and Moderate Inversion</P><P>The Deep Submicron MOS Transistor</P><I><P>Scaling Methods</P><P>Mobility Reduction</P><P>Velocity Saturation</P><P>Drain-Induced Barrier Lowering</P><P>Hot Carrier Effects</P><P>Gate Leakage Current</P></I><P>References</P><B><P>Input Stages</P></B><P>Transimpedance Amplifiers </P><I><P>The Transimpedance Amplifier as a Feedback Circuit </P></I><P>Common Source Amplifiers </P><I><P>Common Source Amplifier with Resistive Load </P></I><P>Current Mirrors</P><P>Common Source Amplifiers with Active Load</P><P>Source Degenerated Common Source Amplifiers</P><I><P>Feedback in Source Degenerated Amplifiers </P><P>Output Impedance of the Source Degenerated Amplifier</P></I><P>Cascode Amplifiers </P><P>Cascode Current Mirrors </P><I><P>Wide-Swing Current Mirrors </P></I><P>Telescopic Cascode Amplifiers </P><I><P>Folded Cascode</P></I><P>Unbuffered Transresistance Amplifiers</P><P>Source Followers</P><P>Buffered Cascode Amplifiers</P><P>Amplifiers with Rail-to-Rail Output Stage</P><P>Gain Boosting </P><P>Current Mode Input Stages</P><P>References</P><B><P>Input Stages in the Frequency Domain</P></B><P>The Common Source Amplifier in the Frequency Domain</P><I><P>Voltage Driven Common Source Amplifier </P><P>Current Driven Common Source Amplifier </P><P>Analysis of the Common Source Amplifier with the Miller Theorem</P></I><P>Frequency Performance of Cascode Amplifiers</P><P>Frequency Stability of Amplifiers</P><P>Feedback and Frequency Compensation of CMOS OTA</P><I><P>Phase Margin</P><P>Frequency Compensation </P><P>Effect of the Right-Half Plane Zero</P><P>Advanced Compensation Techniques </P></I><P>Frequency Stability and Compensation of Front-End Amplifiers</P><I><P>Transimpedance Amplifier with Ideal Output Buffer </P><P>Input Impedance </P><P>Transimpedance Amplifier with Real Output Buffer</P><P>Input Stages with Gain Boosting </P></I><P>The Charge Sensitive Amplifier</P><P>Frequency Performance of Current Mode Input Stages </P><P>References</P><B><P>Noise</P></B><P>Fundamental Concepts</P><P>Thermal and Shot Noise Spectral Density</P><I><P>Thermal Noise </P><P>Shot Noise</P></I><P>Noise in MOS Transistors </P><I><P>Channel Thermal Noise in MOS Transistors </P><P>Flicker Noise</P></I><P>Noise Calculations in Circuits </P><I><P>Noise in an RC Low-Pass Filter </P><P>Noise in a Single-Stage Front-End </P></I><P>Noise Filtering and Optimization of the Signal-to-Noise Ratio </P><I><P>The Matched Filter </P><P>Optimum Filter for Energy Measurements </P><P>Optimum Filter for Timing Measurements </P></I><P>References</P><B><P>Time Invariant Shapers</P></B><P>Ideal Charge Sensitive Amplifiers </P><P>The CR-RC Shaper </P><P>CR-RC<I><SUP>n</I></SUP> Shapers </P><P>Shapers with Complex Conjugate Poles </P><P>Noise Calculations in Time Invariant Shapers </P><I><P>Noise in CR-RC Shapers </P><P>Noise Calculations in CR-RC<SUP>n</SUP> Shapers </P><P>Noise Slope</P><P>Effect of 1/ f<SUP>a</SUP> Noise </P><P>Alternative Formalism for Noise Calculations</P><P>Noise Simulations</P></I><P>Pole-Zero Cancellation and Baseline Control</P><I><P>Pole-Zero Cancellation</P><P>Baseline Holders and Baseline Restorers </P><P>Baseline Restorers</P><P>Bipolar Shapers </P></I><P>Front-End with Transimpedance Input Stage </P><P>Gain and Bandwidth Limitations in Charge Sensitive Amplifiers</P><I><P>Effects of Finite Gain in the CSA</P><P>Effect of CSA Bandwidth Limitation </P></I><P>Effect of Finite Charge Collection Time</P><P>References</P><B><P>Time Variant Shapers</P></B><P>Ballistic Deficit and the Gated Integrator</P><P>Noise Analysis in the Time Domain </P><I><P>Time-Domain Noise Analysis of the CR-RC Filter</P><P>Time-Domain Noise Analysis of the Gated Integrator </P></I><P>Correlated Double Sampling </P><P>Time-Variant Filters in CMOS Technology</P><P>References</P><B><P>Transistor-Level Front-End Design</P></B><P>Transistor-Level Design of Charge Sensitive Amplifiers</P><I><P>Optimization of the Input Transistor </P><P>Load Design</P><P>Choice of Input Transistor Type</P></I><P>Passive Feedback Networks</P><I><P>Integrated Capacitors </P><P>Passive Resistors </P></I><P>Active Feedback Networks </P><I><P>Feedback Transistors in Linear Region </P><P>Transconductance Feedback </P><P>Feedback with DC Current Compensation</P><P>Constant Current Feedback </P></I><P>Power Supply Rejection</P><P>Implementation of Shaping Amplifiers</P><I><P>Single Stage Shapers </P><P>Multi-Stage Shapers </P><P>Active Shaping Networks</P><P>OTA-C Shapers</P><P>Compact Shaping Cells </P></I><P>Baseline Holder Design </P><P>Fully Differential Front-End</P><P>Implementation of Current Mode Front-Ends </P><P>References</P><B><P>Discriminators</P></B><P>Basic Discriminator Properties </P><I><P>Discriminator Gain and Speed Requirements</P><P>Discriminator Threshold Setting</P></I><P>General Purpose Voltage Discriminators</P><I><P>Two-Stage Discriminators </P><P>Discriminator with Cross-Coupled Loads </P.
Descripción Física:1 online resource (726 pages : 486 illustrations).
ISBN:9781351832014
1351832018