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Through-Silicon Vias for 3D Integration /

This professional book focuses on the latest cost- and space-saving methods of 3D integrated circuits-essential for the development of low-cost, high-performance electronic and optoelectronic products.

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Lau, John H. (Autor)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, N.Y. : McGraw-Hill Education, [2013]
Edición:First edition.
Colección:McGraw-Hill's AccessEngineering.
Temas:
Acceso en línea:Texto completo

MARC

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020 |a 9780071785143 (print-ISBN) 
020 |a 0071785140 (print-ISBN) 
035 |a (OCoLC)931505425 
040 |a IN-ChSCO  |b eng  |e rda 
041 0 |a eng 
050 4 |a TK7874.893 
082 0 4 |a 621.3815  |2 23 
100 1 |a Lau, John H.,  |e author. 
245 1 0 |a Through-Silicon Vias for 3D Integration /  |c John H. Lau. 
250 |a First edition. 
264 1 |a New York, N.Y. :  |b McGraw-Hill Education,  |c [2013] 
264 4 |c ?2013 
300 |a 1 online resource (xxiv, 487 pages) :  |b illustrations. 
336 |a text  |2 rdacontent 
337 |a computer  |2 rdamedia 
338 |a online resource  |2 rdacarrier 
490 1 |a McGraw-Hill's AccessEngineering 
504 |a Includes bibliographical references and index. 
505 0 |a A. About the Author -- B. Foreword -- C. Preface -- D. Acknowledgments -- 1. Nanotechnology and 3D Integration for the Semiconductor Industry -- Introduction -- Nanotechnology -- Three-Dimensional Integration -- Challenges and Outlook of 3D Si Integration -- Potential Applications and Challenges of 3D IC Integration -- Recent Advances of 2.5D IC Integration (Interposers) -- New Trends in TSV Passive Interposers for 3D IC Integration -- Embedded 3D IC Integration -- Summary and Recommendations -- TSV Patents -- References -- General Readings -- 2. Through-Silicon Via Technology -- Introduction -- Who Invented TSV and When -- High-Volume Products with TSV Technology -- Via Forming -- Dielectric Isolation Layer (Oxide Liner) Deposition -- Barrier (Adhesion) Layer and Seed (Metal) Layer Deposition -- TSV Filling by Cu Plating -- Chemical-Mechanical Polishing of Cu Plating Residues -- TSV Cu Reveal -- FEOL and BEOL -- TSV Processes -- References -- 3. Through-Silicon Vias: Mechanical, Thermal, and Electrical Behaviors -- Introduction -- Mechanical Behavior of TSVs in System-in-Package -- Mechanical Behavior of TSVs in Memory-Chip Stacking -- Thermal Behaviors of TSVs -- Electrical Modeling of TSVs -- Electrical Test of Blind TSVs -- References -- 4. Thin-Wafer Strength Measurement -- Introduction -- Piezoresistive Stress Sensors for Thin-Wafer Strength Measurement -- Effects of Wafer Back-Grinding on the Mechanical Behavior of Cu?Low-k Chips -- References -- 5. Thin-Wafer Handling -- Introduction -- Wafer Thinning and Thin-Wafer Handling -- Adhesive Is the Key -- Thin-Wafer Handling Issues and Potential Solutions -- Effect of Dicing Tape on Thin-Wafer Handling of Wafers with Cu/Au Pads -- Effect of Dicing Tape on Thin-Wafer Handling of Wafers with Cu-Ni-Au UBMs -- Effect of Dicing Tape on Thin-Wafer Handling of Interposer with RDLs and Ordinary Solder Bumps -- Materials and Equipments for Thin-Wafer Handling -- Adhesive and Process Guidelines for Thin-Wafer Handling -- Summary and Recommendations -- 3M Wafer Support System -- EVG's Temporary Bonding and Debonding System -- Thin-Wafer Handling with Carrierless Technology -- References -- 6. Microbumping, Assembly, and Reliability -- Introduction -- Problem Definition -- Electroplating Method for Wafer Bumping of Ordinary Solder Bumps -- Assembly of 3D IC Integration SiPs -- Electroplating Method for Wafer Bumping of Solder Microbumps -- Can We Apply the Same Parameters of the Electroplating Method for Ordinary Solder Bumps to Microbumps? -- Summary and Recommendations -- Lead-Free Fine-Pitch Solder Microbumping -- Lead-Free Fine-Pitch C2C Solder Microbump Assembly -- Wafer Bumping of Lead-Free Ultrafine-Pitch Solder Microbumps -- Conclusions and Recommendations -- References -- 7. Microbump Electromigration -- Introduction -- Solder Microjoints with Larger Solder Volumes and Pitch -- Solder Microjoints with Smaller Volumes and Pitches -- References -- 8. Transient Liquid-Phase Bonding: Chip-to-Chip, Chip-to-Wafer, and Wafer-to-Wafer -- Introduction -- How Does Low-Temperature Bonding with Solder Work? -- Low-Temperature C2C [(SiO2/Si3N4/Ti/Cu) to (SiO2/Si3N4/Ti/Cu/In/Sn/Au)] Bonding -- Low-Temperature C2C [(SiO2/Ti/Cu/Au/Sn/In/ Sn/Au) to (SiO2/Ti/Cu/Sn/In/Sn/Au)] Bonding. 
505 0 |a Low-Temperature C2W [(SiO2/Ti/Au/Sn/In/Au) to (SiO2/Ti/Au)] Bonding -- Low-Temperature W2W [TiCuTiAu to TiCuTiAuSnInSnInAu] Bonding -- References -- 9. Thermal Management of Three-Dimensional Integrated Circuit Integration -- Introduction -- Effects of TSV Interposer on Thermal Performance of 3D Integration SiPs -- Thermal Performance of 3D Memory-Chip Stacking -- Effect of Thickness of the TSV Chip on Its Hot-Spot Temperature -- Summary and Recommendations -- Thermal Management System with TSVs and Microchannels for 3D Integration SiPs -- References -- 10. Three-Dimensional Integrated Circuit Packaging -- Introduction -- Cost: TSV Technology versus Wire-Bonding Technology -- Wire Bonding of Stack Dies on Cu?Low-k Chips -- Bare Chip-to-Chip and Face-to-Face Interconnects -- Low-Cost, High-Performance, and High-Density SiPs with Face-to-Face Interconnects -- Fan-Out-Embedded WLP-to-Chip (Face-to-Face) Interconnects -- A Note on Wire-Bonding Reliability -- References -- 11. Future Trends of 3D Integration -- Introduction -- The Trend of 3D Si Integration -- The Trend of 3D IC Integration -- References. 
520 3 |a This professional book focuses on the latest cost- and space-saving methods of 3D integrated circuits-essential for the development of low-cost, high-performance electronic and optoelectronic products. 
530 |a Also available in print edition. 
533 |a Electronic reproduction.  |b New York, N.Y. :  |c McGraw Hill,   |d 2013.  |n Mode of access: World Wide Web.  |n System requirements: Web browser.  |n Access may be restricted to users at subscribing institutions. 
538 |a Mode of access: Internet via World Wide Web. 
546 |a In English. 
588 |a Description based on cover image and table of contents, viewed on November 23, 2015. 
650 0 |a Three-dimensional integrated circuits. 
655 0 |a Electronic books. 
776 0 |i Print version:   |t Through-Silicon Vias for 3D Integration.  |b First edition.  |d New York, N.Y. : McGraw-Hill Education, 2013  |w (OCoLC)748333223 
830 0 |a McGraw-Hill's AccessEngineering. 
856 4 0 |u https://accessengineeringlibrary.uam.elogim.com/content/book/9780071785143  |z Texto completo