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Wafer-Level Testing and Test During Burn-In for Integrated Circuits.

Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Bahukudumbi, Sudarshan
Otros Autores: Chakrabarty, Krishnendu
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Norwood : Artech House, 2010.
Temas:
Acceso en línea:Texto completo