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SAT-Based Scalable Formal Verification Solutions
Functional verification has become an important aspect of the chip design process. Significant resources, both in industry and academia, are devoted to the design complexity and verification endeavors. SAT-Based Scalable Formal Verification Solutions discusses in detail several of the latest and int...
| Clasificación: | Libro Electrónico |
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| Autores principales: | , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2007.
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| Edición: | 1st ed. 2007. |
| Colección: | Integrated Circuits and Systems,
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| Temas: | |
| Acceso en línea: | Texto Completo |