Cargando…

Functional Verification of Programmable Embedded Architectures A Top-Down Approach /

Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many ex...

Descripción completa

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Mishra, Prabhat (Autor), Dutt, Nikil D. (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer US : Imprint: Springer, 2005.
Edición:1st ed. 2005.
Temas:
Acceso en línea:Texto Completo

MARC

LEADER 00000nam a22000005i 4500
001 978-0-387-26399-1
003 DE-He213
005 20220113082214.0
007 cr nn 008mamaa
008 100301s2005 xxu| s |||| 0|eng d
020 |a 9780387263991  |9 978-0-387-26399-1 
024 7 |a 10.1007/b137514  |2 doi 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Mishra, Prabhat.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Functional Verification of Programmable Embedded Architectures  |h [electronic resource] :  |b A Top-Down Approach /  |c by Prabhat Mishra, Nikil D. Dutt. 
250 |a 1st ed. 2005. 
264 1 |a New York, NY :  |b Springer US :  |b Imprint: Springer,  |c 2005. 
300 |a XIX, 180 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a to Functional Verification -- Architecture Specification -- Architecture Specification -- Validation of Specification -- Top-Down Validation -- Executable Model Generation -- Design Validation -- Functional Test Generation -- Future Directions -- Conclusions. 
520 |a Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models. This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect's knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric. Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems. 
650 0 |a Electronic circuits. 
650 0 |a Microprocessors. 
650 0 |a Computer architecture. 
650 0 |a Computers, Special purpose. 
650 0 |a Computer-aided engineering. 
650 0 |a Electronic digital computers-Evaluation. 
650 0 |a Electrical engineering. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Processor Architectures. 
650 2 4 |a Special Purpose and Application-Based Systems. 
650 2 4 |a Computer-Aided Engineering (CAD, CAE) and Design. 
650 2 4 |a System Performance and Evaluation. 
650 2 4 |a Electrical and Electronic Engineering. 
700 1 |a Dutt, Nikil D.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9780387507767 
776 0 8 |i Printed edition:  |z 9780387261430 
776 0 8 |i Printed edition:  |z 9781489973368 
856 4 0 |u https://doi.uam.elogim.com/10.1007/b137514  |z Texto Completo 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712)