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Resource efficient LDPC decoders : from algorithms to hardware architectures /

This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Chandrasetty, Vikram Arkalgud (Autor), Aziz, Syed Mahfuzul (Autor)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: London : Academic Press, an imprint of Elsevier, [2018]
Temas:
Acceso en línea:Texto completo
Descripción
Sumario:This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms. The reader will learn: Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementationHow to reduce computational complexity and power consumption using computer aided design techniquesAll aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs.
Descripción Física:1 online resource : color illustrations
Bibliografía:Includes bibliographical references and index.
ISBN:9780128112564
0128112565
0128112557
9780128112557