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170111s2011 xx o 000 0 eng d |
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|a OTZ
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|a 1167573620
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|z 9780470915660
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|z 0470915668
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|a 9781118171172
|q (ebook)
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|a 1118171179
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|a 9780470915660
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|2 doi
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|z (OCoLC)1167573620
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|b E298 2011eb
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|a 621.3815486
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|a UAMI
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|a Egan, William,
|e author.
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|a Advanced Frequency Synthesis by Phase Lock /
|c Egan, William.
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|a 1st edition.
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|b Wiley-IEEE Press,
|c 2011.
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|a 1 online resource (312 pages)
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|a text
|b txt
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|a text file
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|b 114.95
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|a The latest frequency synthesis techniques, including sigma-delta, Diophantine, and all-digital Sigma-delta is a frequency synthesis technique that has risen in popularity over the past decade due to its intensely digital nature and its ability to promote miniaturization. A continuation of the popular Frequency Synthesis by Phase Lock, Second Edition, this timely resource provides a broad introduction to sigma-delta by pairing practical simulation results with cutting-edge research. Advanced Frequency Synthesis by Phase Lock discusses both sigma-delta and fractional-n-the still-in-use forerunner to sigma-delta-employing Simulink® models and detailed simulations of results to promote a deeper understanding. After a brief introduction, the book shows how spurs are produced at the synthesizer output by the basic process and different methods for overcoming them. It investigates how various defects in sigma-delta synthesis contribute to spurs or noise in the synthesized signal. Synthesizer configurations are analyzed, and it is revealed how to trade off the various noise sources by choosing loop parameters. Other sigma-delta synthesis architectures are then reviewed. The Simulink simulation models that provided data for the preceding discussions are described, providing guidance in making use of such models for further exploration. Next, another method for achieving wide loop bandwidth simultaneously with fine resolution-the Diophantine Frequency Synthesizer-is introduced. Operation at extreme bandwidths is also covered, further describing the analysis of synthesizers that push their bandwidths close to the sampling-frequency limit. Lastly, the book reviews a newly important technology that is poised to become widely used in high-production consumer electronics-all-digital frequency synthesis. Detailed appendices provide in-depth discussion on various stages of development, and many related resources are available for download, including Simulink models, MATLAB® scripts, spreadsheets, and executable programs. All these features make this authoritative reference ideal for electrical engineers who want to achieve an understanding of sigma-delta frequency synthesis and an awareness of the latest developments in the field.
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|f Copyright © Wiley-IEEE Press
|g 2011
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|a Made available through: Safari, an O'Reilly Media Company.
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|a Frontmatter -- Introduction -- Fractional-N and Basic S? Synthesizers -- Other Spurious Reduction Techniques -- Defects in S? Synthesizers -- Other S? Architectures -- Simulation -- Diophantine Synthesizer -- Operation at Extreme Bandwidths -- All-Digital Frequency Synthesizers -- Appendix A: All Digital -- Appendix C: Fractional Cancellation -- Appendix E: Excess PPSD -- Appendix F: References to -- Appendix G: Using Gsmpl -- Appendix H: Sample-and-Hold Circuit -- Appendix L: Loop Response -- Appendix M: Mash PPSD -- Appendix N: Sampled Noise -- Appendix O: Oscillator Spectrums -- Appendix P: Phase Detectors -- Appendix Q: Quantization PPSD -- Appendix R: Reference Frequency Spurs -- Appendix S: Spectrum Analysis -- Appendix T: Toolboxes -- Appendix U: Noise Produced by Charge Pump Current Unbalance (Mismatch) -- Appendix W: Getting Files from the Wiley Internet Site -- Appendix X: Some Tables -- End Notes -- References -- Index.
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|a Includes bibliographical references and index.
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590 |
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|a O'Reilly
|b O'Reilly Online Learning: Academic/Public Library Edition
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|a Engineering.
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|a Engineering
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|a Ingénierie.
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|a engineering.
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|a Engineering.
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|0 (OCoLC)fst00910312
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|a Safari, an O'Reilly Media Company.
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|u https://learning.oreilly.com/library/view/~/9780470915660/?ar
|z Texto completo (Requiere registro previo con correo institucional)
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|a 92
|b IZTAP
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