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Energy efficient servers : blueprints for data center optimization /
Energy Efficient Servers: Blueprints for Data Center Optimization introduces engineers and IT professionals to the power management technologies and techniques used in energy efficient servers. The book includes a deep examination of different features used in processors, memory, interconnects, I/O...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
[New York, NY] :
ApressOpen,
[2015]
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| Colección: | Expert's voice in enterprise computing and power managment.
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| Temas: | |
| Acceso en línea: | Texto completo (Requiere registro previo con correo institucional) |
Tabla de Contenidos:
- ""Contents at a Glance""; ""Contents""; ""About the Authors""; ""About the Technical Reviewers""; ""Contributing Authors""; ""Acknowledgments""; ""Chapter 1: Why Data Center Efficiency Matters""; ""An Industry�s Call to Action""; ""Data Center Infrastructure Energy Use""; ""Energy Proportional Server Efficiency""; ""Regulatory Environment""; ""Measuring Energy Efficiency""; ""SPECPower""; ""High Performance Computing Efficiency""; ""Energy Efficiency and Cost""; ""Summary""; ""Chapter 2: CPU Power Management""; ""Server CPU Architecture/Design""; ""CPU Architecture Building Blocks""
- ""Threads, Cores, and Modules""""Caches and the Cache Hierarchy""; ""Dies and Packages""; ""On-die Fabrics and the Uncore""; ""Power Control Unit""; ""External Communication""; ""Thermal Design""; ""CPU Design Building Blocks""; ""Digital Synchronous Logic and Clocks""; ""SRAM and eDRAM""; ""I/O""; ""Intel Server Processors""; ""Introduction to Power""; ""CPU Power Breakdown""; ""Logic Power""; ""I/O Power""; ""Frequency, Voltage, and Temperature Interactions""; ""Power-Saving Techniques""; ""Turn It Off""; ""Turn It Down""; ""Power-Saving Strategies""; ""Race to Idle vs. Slow Down""
- ""CPU Power and Performance States""""C-States""; ""Thread C-States""; ""Core C-States""; ""Core C0""; ""Core C1 and C1e""; ""Core C3""; ""Core C6""; ""Core C7 (and up)""; ""C-State Demotion""; ""Package C-States""; ""Module C-States""; ""P-States""; ""Per Socket P-States""; ""Per Core P-States""; ""Uncore Frequency Scaling""; ""Turbo""; ""Turbo Architecture""; ""Power/Thermal Limits""; ""Thermal Protection""; ""Electrical Protection""; ""C-States and Turbo""; ""Fused Turbo Frequencies""; ""T-States""; ""S-States and G-States""; ""S0i x""; ""Running Average Power Limit (RAPL)""
- ""IMON and Digital Power Meter""""Linpack Example""; ""DRAM (Memory) RAPL""; ""CPU Thermal Management""; ""Prochot""; ""CPU Power Management Summary""; ""Summary""; ""Chapter 3: Memory and I/O Power Management""; ""System Memory""; ""Memory Architecture Basics""; ""Devices and Ranks""; ""Memory Error Correction (ECC)""; ""Memory Capacity""; ""Device Power Characteristics""; ""DDR3 vs. DDR4""; ""RDIMMs, UDIMMs, SODIMMs, and LRDIMMs""; ""Memory Channel Interleave and Imbalanced Memory Configurations""; ""Power and Performance States""; ""CKE Power Savings""; ""Self-Refresh""
- ""Voltage/Frequency""""DDR Thermal Management""; ""Monitoring Temperature""; ""Memory Throttling""; ""CPU DDRIO""; ""Workload Behavior""; ""Memory Reliability Features""; ""CPU I/Os""; ""CPU Interconnect""; ""Link Power States""; ""PCIe""; ""Link Power States""; ""Link Frequency/Voltage""; ""Link Width""; ""Hot Add""; ""D-states""; ""Summary""; ""Chapter 4: Platform Power Management""; ""Platform Overview""; ""Common Platform Components""; ""Integration""; ""CPU Integration""; ""Chipset Integration""; ""Microservers and Server SoCs""; ""Platform Manageability""; ""CPU Sockets""