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Real-time embedded systems : design principles and engineering practices /

This book integrates new ideas and topics from real time systems, embedded systems, and software engineering to give a complete picture of the whole process of developing software for real-time embedded applications. You will not only gain a thorough understanding of concepts related to microprocess...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Fan, Xiaocong (Autor)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Kidlington, Oxford, UK : Newnes, 2015.
Temas:
Acceso en línea:Texto completo (Requiere registro previo con correo institucional)

MARC

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245 1 0 |a Real-time embedded systems :  |b design principles and engineering practices /  |c Xiaocong Fan. 
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520 |a This book integrates new ideas and topics from real time systems, embedded systems, and software engineering to give a complete picture of the whole process of developing software for real-time embedded applications. You will not only gain a thorough understanding of concepts related to microprocessors, interrupts, and system boot process, appreciating the importance of real-time modeling and scheduling, but you will also learn software engineering practices such as model documentation, model analysis, design patterns, and standard conformance. Features include: coverage of UML standard (UML 2.4); over 20 design patterns which represent the best practices for reuse in a wide range of real-time embedded systems; example codes which have been tested in QNX, a real-time operating system widely adopted in industry. --  |c Edited summary from book. 
505 0 |a Front Cover -- Real-Time Embedded Systems: Design Principles and Engineering Practices -- Copyright -- Contents -- Preface -- Acknowledgments -- Dedication -- Acronyms -- Part I: Introduction -- Chapter 1: Introduction to Embedded and Real-Time Systems -- 1.1 Embedded Systems -- 1.2 Real-Time Systems -- 1.2.1 Soft Real-Time Systems -- 1.2.2 Hard Real-Time Systems -- 1.2.3 Spectrum of Real-Time Systems -- 1.3 Case Study: Radar System -- Problems -- Chapter 2: Cross-Platform Development -- 2.1 Cross-Platform Development Process 
505 8 |a 2.2 Hardware Architecture2.3 Software Development -- 2.3.1 Software Design -- 2.3.2 System Programming Language C/C++ -- 2.3.2.1 Declarations and definitions -- 2.3.2.2 Scope regions -- 2.3.2.3 Storage duration -- 2.3.2.4 Linkage -- 2.3.2.5 Storage-class specifiers -- 2.3.3 Test Hardware-Independent Modules -- 2.4 Build Target Images -- 2.4.1 Cross-Development Toolchain -- 2.4.1.1 Cross compiler/assembler -- 2.4.1.2 Linker -- 2.4.1.3 Dynamic linker -- 2.4.2 Executable and Linking Format -- 2.4.2.1 Linking view -- 2.4.2.2 Execution view 
505 8 |a 2.4.3 Memory Mapping2.4.4 Case Study: Building a QNX Image -- 2.5 Transfer Executable File Object to Target -- 2.6 Integrated Testing on Target -- 2.7 System Production -- Problems -- Chapter 3: Microprocessor Primer -- 3.1 Introduction to Microprocessors -- 3.1.1 Commonly Used Microprocessors -- 3.1.2 Microprocessor Characteristics -- 3.1.2.1 Architectures -- 3.1.2.2 Processing width -- 3.1.2.3 I/O addressing -- 3.1.2.4 Reset vector -- 3.1.2.5 Endianness -- 3.2 Microchip PIC18F8720 -- 3.2.1 Memory Organization -- 3.2.2 Word Write Mode 
505 8 |a 3.2.3 Byte Select Mode3.2.4 Byte Write Mode -- 3.3 Intel 8086 -- 3.3.1 Memory Organization -- 3.3.2 Separate I/O Address Space -- 3.3.2.1 Timing clock -- 3.3.2.2 External bus -- 3.3.2.3 I/O device: UART -- 3.3.3 Memory Address Space -- 3.3.4 Wait States -- 3.4 Intel Pentium -- 3.4.1 Bus State Transition -- 3.4.2 Memory Organization -- 3.5 ARM926EJ-S -- 3.5.1 TCM Interface -- Problems -- Chapter 4: Interrupts -- 4.1 Introduction to Interrupts -- 4.2 External Interrupts -- 4.2.1 Nonvectored Interrupting -- 4.2.2 PIC and Vectored Interrupting 
505 8 |a 4.2.2.1 Maskable interrupts4.2.2.2 Interrupt priorities -- 4.2.2.3 Interrupt source mode -- 4.2.2.4 Interrupt vectoring process -- 4.3 Software Interrupts -- 4.4 Internal Interrupts -- 4.5 Design Patterns for ISRs -- 4.5.1 General ISR Design Pattern -- 4.5.2 ISR with a Server Task -- 4.5.3 ISR Chaining -- 4.5.4 ISR Cascading -- 4.5.5 Data Sharing with ISRs -- 4.6 Interrupt Response Time -- 4.7 Case Study: x86 -- 4.7.1 Hardware Interrupts -- 4.7.2 Put It All Together -- 4.8 Case Study: ARM Processor -- 4.8.1 Hardware Interrupts 
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