Three-dimensional integrated circuit design /
Call Number: | Libro Electrónico |
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Main Author: | |
Other Authors: | |
Format: | Electronic eBook |
Language: | Inglés |
Published: |
Burlington, MA :
Morgan Kaufmann,
©2009.
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Series: | Morgan Kaufmann series in systems on silicon.
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Subjects: | |
Online Access: | Texto completo (Requiere registro previo con correo institucional) |
Table of Contents:
- Cover13;
- Three-Dimensional Integrated Circuit Design
- Copyright Page
- Dedication Page
- Contents
- Preface
- Acknowledgments
- Chapter 1: Introduction
- Chapter 2: Manufacturing of 3-D Packaged Systems
- Chapter 3: 3-D Integrated Circuit Fabrication Technologies
- Chapter 4: Interconnect Prediction Models
- Chapter 5: Physical Design Techniques for 3-D ICs
- Chapter 6: Thermal Management Techniques
- Chapter 7: Timing Optimization for Two-Terminal Interconnects
- Chapter 8: Timing Optimization for Multiterminal Interconnects
- Chapter 9: 3-D Circuit Architectures
- Chapter 10: Case Study
- Chapter 11: Conclusions
- Appendix A: Enumeration of Gate Pairs in a 3-D IC
- Appendix B: Formal Proof of Optimum Single Via Placement
- Appendix C: Proof of the Two-terminal Via Placement Heuristic
- Appendix D: Proof of Condition for Via Placement of Multiterminal Nets
- References
- Index.