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VLSI test principles and architectures : design for testability /

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of indu...

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Détails bibliographiques
Cote:Libro Electrónico
Autres auteurs: Wang, Laung-Terng (Éditeur intellectuel), Wu, Cheng-Wen, EE Ph. D. (Éditeur intellectuel), Wen, Xiaoqing (Éditeur intellectuel)
Format: Électronique eBook
Langue:Inglés
Publié: Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, [2006]
Collection:Morgan Kaufmann series in systems on silicon.
Sujets:
Accès en ligne:Texto completo (Requiere registro previo con correo institucional)
Description
Résumé:This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures. Lecture slides and exercise solutions for all chapters are now available. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.
Description matérielle:1 online resource (xxx, 777 pages) : illustrations
Bibliographie:Includes bibliographical references and index.
ISBN:9780080474793
0080474799