Low power high speed CMOS multiplexer design - Akashe, Shyam; Mishra, Khusbou (Electrical engineering developments series., 2014)
This book proposes the reversible logic Multiplexer and also demarcates between reversible and irreversible logic Multiplexers. For power reduction in future computing technologies, reversible logic is a very productive approach of logic synthesis. The purpose of this book is to reduce power and area of 2:1 MUX, 4:1 MUX and reversible logic while maintaining the viable performance. The diverse configurations are designed using different topologies of 2:1 MUX and 4:1 MUX such as CMOS based MUX, transmission gate and pass transistor. The editors propose a new application of GDI (Gate-Diffusion I.