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Vertical 3D Memory Technologies.
The large scale integration and planar scaling of individual system chips is reaching an expensive limit. If individual chips now, and later terrabyte memory blocks, memory macros, and processing cores, can be tightly linked in optimally designed and processed small footprint vertical stacks, then p...
| Call Number: | Libro Electrónico |
|---|---|
| Main Author: | |
| Format: | Electronic eBook |
| Language: | Inglés |
| Published: |
Hoboken :
Wiley,
2014.
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| Subjects: | |
| Online Access: | Texto completo |