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FSM-based digital design using Verilog HDL /
As digital circuit elements decrease in physical size, resulting in increasingly complex systems, a basic logic model that can be used in the control and design of a range of semiconductor devices is vital. Finite State Machines (FSM) have numerous advantages; they can be applied to many areas (incl...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Chichester, England ; Hoboken, NJ :
J. Wiley & Sons,
©2008.
|
| Temas: | |
| Acceso en línea: | Texto completo Texto completo |
MARC
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| 037 | |a 10.1002/9780470987629 |b Wiley InterScience |n http://www3.interscience.wiley.com | ||
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| 049 | |a UAMI | ||
| 100 | 1 | |a Minns, Peter D. | |
| 245 | 1 | 0 | |a FSM-based digital design using Verilog HDL / |c Peter Minns, Ian Elliott. |
| 246 | 3 | |a Finite state machine based digital design using Verilog HDL | |
| 260 | |a Chichester, England ; |a Hoboken, NJ : |b J. Wiley & Sons, |c ©2008. | ||
| 300 | |a 1 online resource (xiii, 391 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a data file | ||
| 504 | |a Includes bibliographical references and index. | ||
| 588 | 0 | |a Print version record. | |
| 505 | 0 | |a FSM-based Digital Design using Verilog HDL; Contents; Preface; Acknowledgements; 1 Introduction to Finite-State Machines and State Diagrams for the Design of Electronic Circuits and Systems; 2 Using State Diagrams to Control External Hardware Subsystems; 3 Synthesizing Hardware from a State Diagram; 4 Synchronous Finite-State Machine Designs; 5 The One Hot Technique in Finite-State Machine Design; 6 Introduction to Verilog HDL; 7 Elements of Verilog HDL; 8 Describing Combinational and Sequential Logic using Verilog HDL; 9 Asynchronous Finite-State Machines; 10 Introduction to Petri Nets. | |
| 505 | 8 | |a Appendix A: Logic Gates and Boolean Algebra Used in the BookAppendix B: Counting and Shifting Circuit Techniques; Appendix C: Tutorial on the Use of Verilog HDL to Simulate a Finite-State Machine Design; Appendix D: Implementing State Machines using Verilog Behavioural Mode; Index. | |
| 520 | |a As digital circuit elements decrease in physical size, resulting in increasingly complex systems, a basic logic model that can be used in the control and design of a range of semiconductor devices is vital. Finite State Machines (FSM) have numerous advantages; they can be applied to many areas (including motor control, and signal and serial data identification to name a few) and they use less logic than their alternatives, leading to the development of faster digital hardware systems. This clear and logical book presents a range of novel techniques for the rapid and reliable design of digita. | ||
| 546 | |a English. | ||
| 590 | |a O'Reilly |b O'Reilly Online Learning: Academic/Public Library Edition | ||
| 590 | |a ProQuest Ebook Central |b Ebook Central Academic Complete | ||
| 650 | 0 | |a Verilog (Computer hardware description language) | |
| 650 | 0 | |a Digital electronics. | |
| 650 | 0 | |a Sequential machine theory. | |
| 650 | 6 | |a Verilog (Langage de description de matériel informatique) | |
| 650 | 6 | |a Électronique numérique. | |
| 650 | 6 | |a Théorie des machines séquentielles. | |
| 650 | 7 | |a COMPUTERS |x Data Processing. |2 bisacsh | |
| 650 | 7 | |a Digital electronics |2 fast | |
| 650 | 7 | |a Sequential machine theory |2 fast | |
| 650 | 7 | |a Verilog (Computer hardware description language) |2 fast | |
| 650 | 7 | |a Digitalelektronik |2 gnd | |
| 650 | 7 | |a Digitales System |2 gnd | |
| 650 | 7 | |a VERILOG |2 gnd | |
| 700 | 1 | |a Elliott, Ian D. | |
| 758 | |i has work: |a FSM-based digital design using Verilog HDL (Text) |1 https://id.oclc.org/worldcat/entity/E39PCGgWVyVJvWMFgBTFybY8wd |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 0 | 8 | |i Print version: |a Minns, Peter D. |t FSM-based digital design using Verilog HDL. |d Chichester, England ; Hoboken, NJ : J. Wiley & Sons, ©2008 |w (DLC) 2007043838 |
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