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ESL Design and Verification : a Prescription for Electronic System Level Methodology.
System-Level Design is offering competitive advantage in modern, system-on-chip design and this is THE authoritative reference!
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Otros Autores: | , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Burlington :
Elsevier,
2007.
|
| Colección: | Systems on Silicon S.
|
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
| LEADER | 00000cam a2200000Mi 4500 | ||
|---|---|---|---|
| 001 | EBOOKCENTRAL_ocn476056780 | ||
| 003 | OCoLC | ||
| 005 | 20240329122006.0 | ||
| 006 | m o d | ||
| 007 | cr mn|---||||| | ||
| 008 | 091207s2007 vtu o 000 0 eng d | ||
| 040 | |a EBLCP |b eng |e pn |c EBLCP |d NRU |d OCLCQ |d UKDOC |d OCLCQ |d DEBSZ |d OCLCQ |d ZCU |d MERUC |d ICG |d OCLCO |d OCLCF |d OCLCQ |d OCLCO |d OCLCQ |d DKC |d OCLCQ |d OCLCO |d OCLCL | ||
| 020 | |a 9780080488837 |q (electronic bk.) | ||
| 020 | |a 0080488838 |q (electronic bk.) | ||
| 029 | 1 | |a AU@ |b 000048757245 | |
| 029 | 1 | |a DEBBG |b BV044124155 | |
| 029 | 1 | |a DEBSZ |b 430397186 | |
| 035 | |a (OCoLC)476056780 | ||
| 050 | 4 | |a TK7895.E42 M365 2007 |a TK7895.E42B326 2007 |a TK7895.E42 | |
| 082 | 0 | 4 | |a 621.3815 22 |a 621.3815 |
| 049 | |a UAMI | ||
| 100 | 1 | |a Bailey, Brian. | |
| 245 | 1 | 0 | |a ESL Design and Verification : |b a Prescription for Electronic System Level Methodology. |
| 260 | |a Burlington : |b Elsevier, |c 2007. | ||
| 300 | |a 1 online resource (489 pages) | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a Systems on Silicon S. | |
| 520 | |a System-Level Design is offering competitive advantage in modern, system-on-chip design and this is THE authoritative reference! | ||
| 505 | 0 | |a Front cover; ESL DESIGN AND VERIFICATION; Copyright page; Table of contents; FOREWORD: ESL FROM THE TRENCHES; AUTHORS' ACKNOWLEDGMENTS; ABOUT THE AUTHORS; ABOUT THE CONTRIBUTORS; Chapter 1. WHAT IS ESL?; Chapter 2. TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL; Chapter 3. EVOLUTION OF ESL DEVELOPMENT; Chapter 4. WHAT ARE THE ENABLERS OF ESL?; Chapter 5. ESL FLOW; Chapter 6. SPECIFICATIONS AND MODELING; Chapter 7. PRE-PARTITIONING ANALYSIS; Chapter 8. PARTITIONING; Chapter 9. POST-PARTITIONING ANALYSIS AND DEBUG; Chapter 10. POST-PARTITIONING VERIFICATION. | |
| 588 | 0 | |a Print version record. | |
| 590 | |a ProQuest Ebook Central |b Ebook Central Academic Complete | ||
| 650 | 0 | |a Systems on a chip |x Design and construction. | |
| 650 | 7 | |a Systems on a chip |x Design and construction |2 fast | |
| 700 | 1 | |a Martin, Grant. | |
| 700 | 1 | |a Piziali, Andrew. | |
| 758 | |i has work: |a ESL design and verification (Text) |1 https://id.oclc.org/worldcat/entity/E39PCH8XhHjW3bQ3jYWXkBVqDC |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 1 | |z 9780123735515 | |
| 830 | 0 | |a Systems on Silicon S. | |
| 856 | 4 | 0 | |u https://ebookcentral.uam.elogim.com/lib/uam-ebooks/detail.action?docID=294121 |z Texto completo |
| 938 | |a 123Library |b 123L |n 36465 | ||
| 938 | |a EBL - Ebook Library |b EBLB |n EBL294121 | ||
| 994 | |a 92 |b IZTAP | ||