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System-on-a-chip : Design And Test.
Starting with a basic overview of system-on-a-chip (SoC) including definitions of related terms, this text explains SoC design challenges, together with developments in SoC design and test methodologies.
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Norwood :
Artech House,
2006.
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| Temas: | |
| Acceso en línea: | Texto completo |
Tabla de Contenidos:
- Contents v; Preface xi; Acknowledgment xiii; 1 Introduction 3; 1.1 Architecture of the Present-Day SoC 5; 1.2 Design Issues of SoC 8; 1.3 Hardware-Software Codesign 14; 1.4 Core Libraries, EDA Tools, and Web Pointers 21; References 29; 2 Design Methodology for Logic Cores 33; 2.1 SoC Design Flow 34; 2.2 General Guidelines for Design Reuse 36; 2.3 Design Process for Soft and Firm Cores 43; 2.4 Design Process for Hard Cores 47; 2.5 Sign-Off Checklist and Deliverables 51; 2.6 System Integration 53; References 55; 3 Design Methodology for Memory and Analog Cores 57.
- 3.1 Why Large Embedded Memories 573.2 Design Methodology for Embedded Memories 59; 3.3 Specifications of Analog Circuits 72; 3.4 High-Speed Circuits 79; References 83; 4 Design Validation 85; 4.1 Core-Level Validation 86; 4.2 Core Interface Verification 93; 4.3 SoC Design Validation 95; Reference 103; 5 Core and SoC Design Examples 105; 5.1 Microprocessor Cores 105; 5.2 Comments on Memory Core Generat.