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Low-Noise Low-Power Design for Phase-Locked Loops Multi-Phase High-Performance Oscillators /
This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive...
| Call Number: | Libro Electrónico |
|---|---|
| Main Authors: | , |
| Corporate Author: | |
| Format: | Electronic eBook |
| Language: | Inglés |
| Published: |
Cham :
Springer International Publishing : Imprint: Springer,
2015.
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| Edition: | 1st ed. 2015. |
| Subjects: | |
| Online Access: | Texto Completo |
Table of Contents:
- Introduction
- Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL
- A Wide-Band 0.13µm SiGe BiCMOS PLL for X-Band Radar
- Design and Analysis of QVCO with Different Coupling Techniques
- Design and Analysis of a 0.6V QVCO with Capacitive-Coupling Technique
- Conclusions.