Instruction Level Parallelism

Since its introduction decades ago, Instruction Level Parallelism (ILP) has gradually become ubiquitous and is now featured in virtually every processor built today, from general purpose CPUs to application-specific and embedded processors. Because these architectures could not exist or (in the case...

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Bibliographic Details
Call Number:Libro Electrónico
Main Authors: Aiken, Alex (Author), Banerjee, Utpal (Author), Kejariwal, Arun (Author), Nicolau, Alexandru (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:Inglés
Published: New York, NY : Springer US : Imprint: Springer, 2016.
Edition:1st ed. 2016.
Subjects:
Microprocessors.
Computer architecture.
Telecommunication.
Compilers (Computer programs).
Computers.
Processor Architectures.
Communications Engineering, Networks.
Compilers and Interpreters.
Hardware Performance and Reliability.
Online Access:Texto Completo
Table of Contents:
  • Introduction
  • Overview of ILP Architectures
  • Scheduling Basic Blocks
  • Trace Scheduling
  • Percolation Scheduling
  • Modulo Scheduling
  • Software Pipelining by Kernal Recognition
  • Epilogue.

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