Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs

This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within l...

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Bibliographic Details
Call Number:Libro Electrónico
Main Authors: Ruiz-Amaya, Jesús (Author), Delgado-Restituto, Manuel (Author), Rodríguez-Vázquez, Ángel (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:Inglés
Published: New York, NY : Springer New York : Imprint: Springer, 2011.
Edition:1st ed. 2011.
Subjects:
Electronic circuits.
Signal processing.
Microprocessors.
Computer architecture.
Electronic Circuits and Systems.
Signal, Speech and Image Processing .
Processor Architectures.
Online Access:Texto Completo

MARC

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245 1 0 |a Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs  |h [electronic resource] /  |c by Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez. 
250 |a 1st ed. 2011. 
264 1 |a New York, NY :  |b Springer New York :  |b Imprint: Springer,  |c 2011. 
300 |a XIII, 209 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
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505 0 |a Pipeline ADC Overview -- Design Methodologies for Pipeline ADCs -- Pipeline ADC Electrical-level Synthesis Tool -- Behavioural Modeling of Pipeline ADCs -- Case Study: Design of a 10BIT@60MS Pipeline ADC -- Experimental Results and State of the Art -- Conclusions and Future Lines of Research. 
520 |a This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations.  As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.  Describes efficient procedures for heirarchical top-down design of pipeline converters;  Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents;   Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes.        . 
650 0 |a Electronic circuits. 
650 0 |a Signal processing. 
650 0 |a Microprocessors. 
650 0 |a Computer architecture. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Signal, Speech and Image Processing . 
650 2 4 |a Processor Architectures. 
700 1 |a Delgado-Restituto, Manuel.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Rodríguez-Vázquez, Ángel.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9781489993182 
776 0 8 |i Printed edition:  |z 9781441988454 
776 0 8 |i Printed edition:  |z 9781441988478 
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912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712) 

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