Loading…
Low Power Networks-on-Chip
Low Power Networks-on-Chip Edited by: (editors) Cristina Silvano Marcello Lajolo Gianluca Palermo In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and res...
| Call Number: | Libro Electrónico |
|---|---|
| Corporate Author: | |
| Other Authors: | , , |
| Format: | Electronic eBook |
| Language: | Inglés |
| Published: |
New York, NY :
Springer US : Imprint: Springer,
2011.
|
| Edition: | 1st ed. 2011. |
| Subjects: | |
| Online Access: | Texto Completo |