Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms

We are presently observing a paradigm change in designing complex SoC as it occurs roughly every twelve years due to the exponentially increasing number of transistors on a chip. This design discontinuity, as all previous ones, is characterized by a move to a higher level of abstraction. This is req...

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Détails bibliographiques
Cote:Libro Electrónico
Auteurs principaux: Kogel, Tim (Auteur), Leupers, Rainer (Auteur), Meyr, Heinrich (Auteur)
Collectivité auteur: SpringerLink (Online service)
Format: Électronique eBook
Langue:Inglés
Publié: Dordrecht : Springer Netherlands : Imprint: Springer, 2006.
Édition:1st ed. 2006.
Sujets:
Electronic circuits.
Software engineering.
Electronics.
Computer simulation.
Computers, Special purpose.
Computer-aided engineering.
Electronic Circuits and Systems.
Software Engineering.
Electronics and Microelectronics, Instrumentation.
Computer Modelling.
Special Purpose and Application-Based Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Accès en ligne:Texto Completo
Table des matières:
  • Foreword. Preface
  • 1. Introduction
  • 2. Embedded SOC Applications
  • 3. Classification of Platform Elements
  • 4. System Level Design Principles
  • 5. Related Work
  • 6. Methodology Overview
  • 7. Unified Timing Model
  • 8. MP-SOC Simulation Framework
  • 9. Case Study
  • 10. Summary
  • Appendices. A: The OSCI TLM Standard. B: The OCPIP TL3 Channel. C: The Architects View Framework
  • List of Figures. List of Tables. References
  • Index.

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