Wafer Level 3-D ICs Process Technology

Wafer Level 3-D ICs Process Technology focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses alternative technology platforms for pre-packaging wafer level 3-D ICs, with an emphasis on wafer-to-wafer stacking. Driven by the need for impro...

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Détails bibliographiques
Cote:Libro Electrónico
Collectivité auteur: SpringerLink (Online service)
Autres auteurs: Tan, Chuan Seng (Éditeur intellectuel), Gutmann, Ronald J. (Éditeur intellectuel), Reif, L. Rafael (Éditeur intellectuel)
Format: Électronique eBook
Langue:Inglés
Publié: New York, NY : Springer US : Imprint: Springer, 2008.
Édition:1st ed. 2008.
Collection:Integrated Circuits and Systems,
Sujets:
Electronics.
Optical materials.
Surfaces (Technology).
Thin films.
Engineering.
Electronics and Microelectronics, Instrumentation.
Optical Materials.
Surfaces, Interfaces and Thin Film.
Technology and Engineering.
Accès en ligne:Texto Completo
Table des matières:
  • Overview of Wafer-Level 3D ICs
  • Monolithic 3D Integrated Circuits
  • Stacked CMOS Technologies
  • Wafer-Bonding Technologies and Strategies for 3D ICs
  • Through-Silicon Via Fabrication, Backgrind, and Handle Wafer Technologies
  • Cu Wafer Bonding for 3D IC Applications
  • Cu/Sn Solid#x2013;Liquid Interdiffusion Bonding
  • An SOI-Based 3D Circuit Integration Technology
  • 3D Fabrication Options for High-Performance CMOS Technology
  • 3D Integration Based upon Dielectric Adhesive Bonding
  • Direct Hybrid Bonding
  • 3D Memory
  • Circuit Architectures for 3D Integration
  • Thermal Challenges of 3D ICs
  • Status and Outlook.

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