Timing Optimization Through Clock Skew Scheduling

Timing Optimization Through Clock Skew Scheduling focuses on optimizing the timing of large scale, high performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits. This researc...

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Bibliographic Details
Call Number:Libro Electrónico
Main Authors: Kourtev, Ivan S. (Author), Taskin, Baris (Author), Friedman, Eby G. (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:Inglés
Published: New York, NY : Springer US : Imprint: Springer, 2009.
Edition:1st ed. 2009.
Subjects:
Electronic circuits.
Electrical engineering.
Computer-aided engineering.
Electronics.
Electronic Circuits and Systems.
Electrical and Electronic Engineering.
Computer-Aided Engineering (CAD, CAE) and Design.
Electronics and Microelectronics, Instrumentation.
Online Access:Texto Completo
Table of Contents:
  • VLSI Systems
  • Signal Delay in VLSI Systems
  • Timing Properties of Synchronous Systems
  • Clock Skew Scheduling and Clock Tree Synthesis
  • Clock Skew Scheduling of Level-Sensitive Circuits
  • Clock Skew Scheduling for Improved Reliability
  • Delay Insertion and Clock Skew Scheduling
  • Practical Considerations
  • Clock Skew Scheduling in Rotary Clocking Technology
  • Experimental Results.

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