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The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits The semi-empirical and compact model approaches /
How to determine transistor sizes and currents when the supply voltages of analog CMOS circuits do not exceed 1.2V and transistors operate in weak, moderate or strong inversion? The gm/ID methodology offers a solution provided a reference transconductance over drain current ratio is available. The r...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2010.
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| Edición: | 1st ed. 2010. |
| Colección: | Analog Circuits and Signal Processing,
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| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
| LEADER | 00000nam a22000005i 4500 | ||
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| 001 | 978-0-387-47101-3 | ||
| 003 | DE-He213 | ||
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| 008 | 100301s2010 xxu| s |||| 0|eng d | ||
| 020 | |a 9780387471013 |9 978-0-387-47101-3 | ||
| 024 | 7 | |a 10.1007/978-0-387-47101-3 |2 doi | |
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| 100 | 1 | |a Jespers, Paul. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 4 | |a The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits |h [electronic resource] : |b The semi-empirical and compact model approaches / |c by Paul Jespers. |
| 250 | |a 1st ed. 2010. | ||
| 264 | 1 | |a New York, NY : |b Springer US : |b Imprint: Springer, |c 2010. | |
| 300 | |a XVI, 171 p. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 490 | 1 | |a Analog Circuits and Signal Processing, |x 2197-1854 | |
| 520 | |a How to determine transistor sizes and currents when the supply voltages of analog CMOS circuits do not exceed 1.2V and transistors operate in weak, moderate or strong inversion? The gm/ID methodology offers a solution provided a reference transconductance over drain current ratio is available. The reference may be the result of measurements carried out on real physical transistors or advanced models. The reference may also take advantage of a compact model. In The gm/ID Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits, we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files found on extras-springer.com allow redoing the tests. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Electronics. | |
| 650 | 0 | |a Microprocessors. | |
| 650 | 0 | |a Computer architecture. | |
| 650 | 0 | |a Condensed matter. | |
| 650 | 0 | |a Spectrum analysis. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Electronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | |a Processor Architectures. |
| 650 | 2 | 4 | |a Condensed Matter Physics. |
| 650 | 2 | 4 | |a Spectroscopy. |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9780387564388 |
| 776 | 0 | 8 | |i Printed edition: |z 9781461425052 |
| 776 | 0 | 8 | |i Printed edition: |z 9780387471006 |
| 830 | 0 | |a Analog Circuits and Signal Processing, |x 2197-1854 | |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/978-0-387-47101-3 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||