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Functional Verification of Programmable Embedded Architectures A Top-Down Approach /

Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many ex...

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Détails bibliographiques
Cote:Libro Electrónico
Auteurs principaux: Mishra, Prabhat (Auteur), Dutt, Nikil D. (Auteur)
Collectivité auteur: SpringerLink (Online service)
Format: Électronique eBook
Langue:Inglés
Publié: New York, NY : Springer US : Imprint: Springer, 2005.
Édition:1st ed. 2005.
Sujets:
Accès en ligne:Texto Completo

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