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FinFET modeling for IC simulation and design : using the BSIM-CMG standard /
This book explains FinFET modeling for IC simulation and the industry standard - BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved industry standard. It gives a strong foundation on the physics and operation of FinFET...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
London, UK :
Academic Press,
2015.
|
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
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| 245 | 0 | 0 | |a FinFET modeling for IC simulation and design : |b using the BSIM-CMG standard / |c Yogesh Singh Chauhan [and more]. |
| 264 | 1 | |a London, UK : |b Academic Press, |c 2015. | |
| 300 | |a 1 online resource | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 500 | |a Includes index. | ||
| 588 | 0 | |a Online resource; title from PDF title page (ScienceDirect, viewed March 30, 2015). | |
| 504 | |a Includes bibliographical references and index. | ||
| 520 | |a This book explains FinFET modeling for IC simulation and the industry standard - BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved industry standard. It gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, providing a step-by-step approach for the efficient extraction of model parameters. You will learn: why you should use FinFET; physics and operation of FinFET; details of the FinFET standard model (BSIM-CMG); parameter extraction in BSIM-CMG; FinFET circuit design and simulation. -- |c Edited summary from book. | ||
| 505 | 0 | |a Front Cover; FinFET Modeling for IC Simulation and Design: Using the BSIM-CMG Standard; Copyright; Contents; Author Biographies; Preface; Chapter 1:FinFET-From device concept to standard compact model; 1.1 The root cause of short-channel effects in the twenty-first century MOSFETs; 1.2 The thin-body MOSFET concept; 1.3 The FinFET and a new scaling path for MOSFETs; 1.4 Ultra-thin-body FET; 1.5 FinFET compact model-the bridge between FinFET technology and IC design; 1.6 A brief history of the first standard compact model, BSIM; 1.7 Core and real-device models. | |
| 505 | 8 | |a 1.8 The industry standard FinFET compact modelReferences; Chapter 2: Compact models for analog and RF applications; 2.1 Introduction; 2.2 Important Compact Model Metrics; 2.3 Analog Metrics; 2.3.1 Quiescent Operating Point; 2.3.2 Geometric Scalability; 2.3.3 Variability Model; 2.3.4 Intrinsic Voltage Gain; 2.3.5 Speed: Unity Gain Frequency; 2.3.6 Noise; 2.3.7 Linearity and Symmetry; Harmonic distortion; Gain compression; Memory effects; Intermodulation distortion; 2.3.8 Symmetry; 2.4 RF Metrics; 2.4.1 Two-Port Parameters; 2.4.2 The Need for Speed. | |
| 505 | 8 | |a The maximum unity power gain frequency (fmax) Mason's unilateral gain U; 2.4.3 Non-Quasi-Static Model; 2.4.4 Noise; Minimum achievable noise figure (Fmin); Simple model for FET noise; Phase noise; Phase noise derivation: Lorentzian spectrum; Phase noise and flicker noise; 2.4.5 Linearity; Memory effects; Other distortion metrics; 2.5 Conclusion; References; Chapter 3:Core model for FinFETs; 3.1 Core Model for Double-Gate FinFETs; 3.2 Unified FinFET Compact Model; Chapter 3 Appendix: Explicit surface potential model; 3A.1 Continuous Starting Function. | |
| 505 | 8 | |a 3A.2 Quartic Modified Iteration: Implementation and EvaluationReferences; Chapter 4:Channel current and real device effects; 4.1 Introduction; 4.2 Threshold Voltage Roll-Off; 4.3 Subthreshold Slope Degradation; 4.4 Quantum Mechanical Vth Correction; 4.5 Vertical-Field Mobility Degradation; 4.6 Drain Saturation Voltage, Vdsat; 4.6.1 Extrinsic Case (RDSMOD=1 and 2); 4.6.2 Intrinsic Case (RDSMOD = 0); 4.7 Velocity Saturation Model; 4.8 Quantum Mechanical Effects; 4.8.1 Effective Width Model; 4.8.2 Effective Oxide Thickness/Effective Capacitance; 4.8.3 Charge Centroid Calculation for Accumulation. | |
| 505 | 8 | |a 4.9 Lateral Nonuniform Doping Model4.10 Body Effect Model for a Bulk FinFET (BULKMOD=1); 4.11 Output Resistance Model; 4.11.1 Channel-Length Modulation; 4.11.2 Drain-Induced Barrier Lowering; 4.12 Channel Current; References; Chapter 5:Leakage currents; 5.1 Weak-Inversion Current; 5.2 Gate-Induced Source and Drain Leakages; 5.2.1 GIDL/GISL Current Formulation in BSIM-CMG; 5.3 Gate Oxide Tunneling; 5.3.1 Gate Oxide Tunneling Formulation in BSIM-CMG; 5.3.2 Gate-to-Body Tunneling Current in Depletion/Inversion; 5.3.3 Gate-to-Body Tunneling Current in Accumulation. | |
| 650 | 0 | |a Field-effect transistors |x Computer simulation. | |
| 650 | 0 | |a Integrated circuits |x Computer simulation. | |
| 650 | 6 | |a Transistors �a effet de champ |0 (CaQQLa)201-0053281 |x Simulation par ordinateur. |0 (CaQQLa)201-0379159 | |
| 650 | 6 | |a Circuits int�egr�es |x Simulation par ordinateur. |0 (CaQQLa)201-0180814 | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Mechanical. |2 bisacsh | |
| 650 | 7 | |a Integrated circuits |x Computer simulation |2 fast |0 (OCoLC)fst00975537 | |
| 700 | 1 | |a Chauhan, Yogesh Singh, |e author. | |
| 776 | 0 | 8 | |i Print version: |z 9780124200319 |
| 856 | 4 | 0 | |u https://sciencedirect.uam.elogim.com/science/book/9780124200319 |z Texto completo |