VLSI and computer architecture /

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Shankar, Ravi
Otros Autores: Fernandez, Eduardo B., 1936-
Formato: Electrónico eBook
Idioma:Inglés
Publicado: San Diego : Academic Press, �1989.
Colección:VLSI electronics ; v. 20.
Temas:
Integrated circuits > Very large scale integration.
Computer architecture.
Circuits int�egr�es �a tr�es grande �echelle.
Ordinateurs > Architecture.
TECHNOLOGY & ENGINEERING > Mechanical.
Computer architecture
Integrated circuits > Very large scale integration
Acceso en línea:Texto completo
Texto completo

MARC

LEADER 00000cam a2200000 i 4500
001 SCIDIR_ocn893872997
003 OCoLC
005 20231120111840.0
006 m o d
007 cr cnu---unuuu
008 141027s1989 caua ob 001 0 eng d
040 |a OPELS  |b eng  |e rda  |e pn  |c OPELS  |d N$T  |d YDXCP  |d OCLCQ  |d EBLCP  |d DEBSZ  |d UAB  |d OCLCQ  |d MERUC  |d STF  |d OCLCQ  |d LUN  |d OCLCQ  |d OCLCO  |d OCLCQ  |d OCLCO 
019 |a 923624613 
020 |a 9781483217840  |q (electronic bk.) 
020 |a 1483217841  |q (electronic bk.) 
020 |z 0122341206  |q (alk. paper) 
020 |z 0122341201 
020 |z 9780122341205 
035 |a (OCoLC)893872997  |z (OCoLC)923624613 
050 4 |a TK7874  |b .V56 vol. 20eb 
072 7 |a TEC  |x 009070  |2 bisacsh 
082 0 4 |a 621.395  |2 22 
084 |a *68-02  |2 msc 
084 |a 68M01  |2 msc 
084 |a 68W35  |2 msc 
084 |a ZN 4940  |2 rvk 
084 |a DAT 200f  |2 stub 
084 |a ELT 355f  |2 stub 
100 1 |a Shankar, Ravi. 
245 1 0 |a VLSI and computer architecture /  |c Ravi Shankar, Eduardo B. Fernandez. 
264 1 |a San Diego :  |b Academic Press,  |c �1989. 
300 |a 1 online resource (xiii, 487 pages) :  |b illustrations 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a VLSI electronics ;  |v volume 20 
504 |a Includes bibliographical references and index. 
588 0 |a Print version record. 
505 0 |a Front Cover -- VLSI and Computer Architecture -- Copyright Page -- Table of Contents -- Preface to Part I -- Preface to Part II -- Part I: SYSTEM DESIGN -- Chapter 1. An Introduction to VLSI -- 1.1. THE EVOLUTION OF DIGITAL ELECTRONICS TOWARD VLSI AND BEYOND -- 1.2. A COMPARISON OF DIFFERENT VLSI TECHNOLOGIES -- Chapter 2. Silicon MOS Technology -- 2.1. INTRODUCTION -- 2.2. DEVICE CHARACTERISTICS -- 2.3. LOGIC FAMILIES -- 2.4. MEMORY ELEMENTS -- 2.5. FABRICATION -- 2.6. SCALING AND DESIGN RULES -- 2.7. SCALING CONSTRAINTS AND VLSI TRENDS 
505 8 |a 2.8. SYSTEM PERFORMANCE CONSIDERATIONS2.9. PROCESSOR DESIGN CONSIDERATIONS -- Chapter 3. Silicon Bipolar Integrated Circuits -- 3.1. INTRODUCTION -- 3.2. LOGIC FAMILIES -- 3.3. MEMORY ELEMENTS -- 3.4. FABRICATION -- 3.5. SYSTEM PERFORMANCE CONSIDERATIONS -- 3.6. PROCESSOR DESIGN CONSIDERATIONS -- 3.7. BIPOLAR TRENDS -- Chapter 4. Gallium-Arsenide Technology -- 4.1. INTRODUCTION -- 4.2. DEVICES -- 4.3. FABRICATION -- 4.4. LOGIC FAMILIES -- 4.5. SYSTEM PERFORMANCE CONSIDERATIONS -- 4.6. PROCESSOR DESIGN CONSIDERATIONS 
505 8 |a Chapter 5. Superconductive Electronics5.1. INTRODUCTION -- 5.2. DEVICES -- 5.3. FABRICATION -- 5.4. LOGIC FAMILIES -- 5.5. MEMORY ELEMENTS -- 5.6. SYSTEM PERFORMANCE CONSIDERATIONS -- 5.7. PROCESSOR DESIGN CONSIDERATIONS -- Chapter 6. An Overview of Digital VLSI System Design -- 6.1. INTRODUCTION -- 6.2. DESIGN METHODOLOGIES -- 6.3. DESIGN AIDS AND TOOLS -- 6.4. DESIGN STYLES -- 6.5. COMPARISON OF DIFFERENT DESIGN STYLES -- 6.6. CURRENT RESEARCH AND DEVELOPMENT EFFORTS -- Chapter 7. Design Automation Tools -- 7.1. INTRODUCTION 
505 8 |a 7.2. STANDARD INTERFACES7.3. LOGIC SYNTHESIS AND OPTIMIZATION -- 7.4. PLACEMENT AND ROUTING -- 7.5. TESTING -- 7.6. SILICON COMPILERS -- Chapter 8. Examples of CAD Systems and VLSI Designs -- 8.1. INTRODUCTION -- 8.2. BIPOLAR SYSTEMS -- 8.3. MOS SYSTEMS: UNIVERSITY-BASED DESIGNS -- 8.4. MOS SYSTEMS: COMMERCIAL DESIGNS -- 8.5. GALLIUM-ARSENIDE SYSTEMS -- 8.6. SUPERCONDUCTING SYSTEMS -- Chapter 9. VLSI Trends -- 9.1. FABRICATION -- 9.2. VERY HIGH SPEED INTEGRATED CIRCUITS -- 9.3. TESTABILITY AND TESTING -- 9.4. THREE-DIMENSIONAL INTEGRATED CIRCUITS 
505 8 |a 9.5. FAULT TOLERANCE TECHNIQUES AND YIELD9.6. PACKAGING -- 9.7. INTEGRATION OF ANALOG FUNCTIONS -- References -- Part II: Architectural Aspects -- Chapter 10. Introduction -- 10.1. MOTIVATION -- 10.2. VLSI AS AN IMPLEMENTATION MEDIUM -- 10.3. ADVANCES -- 10-4. OVERVIEW OF PART II -- Chapter 11. Architectural Requirements -- 11.1. GENERAL OBJECTIVES OF AN ARCHITECTURE -- 11.2. INSTRUCTION SET ARCHITECTURE -- 11.3. MICROARCHITECTURE -- 11.4. SUPPORT FOR DATA STRUCTURES AND DATA TYPES -- 11.5. SUPPORT FOR SUBROUTINE CALLS -- 11.6. MEMORY MANAGEMENT 
650 0 |a Integrated circuits  |x Very large scale integration. 
650 0 |a Computer architecture. 
650 6 |a Circuits int�egr�es �a tr�es grande �echelle.  |0 (CaQQLa)201-0117255 
650 6 |a Ordinateurs  |x Architecture.  |0 (CaQQLa)201-0015834 
650 7 |a TECHNOLOGY & ENGINEERING  |x Mechanical.  |2 bisacsh 
650 7 |a Computer architecture  |2 fast  |0 (OCoLC)fst00872026 
650 7 |a Integrated circuits  |x Very large scale integration  |2 fast  |0 (OCoLC)fst00975602 
700 1 |a Fernandez, Eduardo B.,  |d 1936- 
776 0 8 |i Print version:  |a Shankar, Ravi.  |t VLSI and computer architecture  |z 0122341201  |w (DLC) 88024117  |w (OCoLC)18350154 
830 0 |a VLSI electronics ;  |v v. 20. 
856 4 0 |u https://sciencedirect.uam.elogim.com/science/book/9780122341205  |z Texto completo 
856 4 0 |u https://sciencedirect.uam.elogim.com/science/bookseries/07367031/20  |z Texto completo 

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