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Digital computer structure and design /
Digital Computer Structure and Design.
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
London ; Boston :
Butterworth Scientific,
1982.
|
| Edición: | 2d edition. |
| Temas: | |
| Acceso en línea: | Texto completo |
Tabla de Contenidos:
- Front Cover; Digital Computer Structure and Design; Copyright Page; Preface to Second Edition; Table of Contents; Chapter 1. Introduction; Physical Description; Minicomputers; Special Purpose Computers; Computer Applications; REFERENCES; Chapter 2. Switching Theory; Logic Elements; Switching Algebra (Boolean Algebra); NAND and NOR Gates; Mapping Methods; Unconditional or Don't Care Terms; Networks with Multiple Outputs; Problems; REFERENCES; Chapter 3. Counters and Sequential Circuits; The Flip-Flop Register; The Shift Register; The JK Flip-flop; The Sequential Circuit; The Type 1 Circuit.
- The Type 3 CircuitThe State Diagram; The State Table
- Synchronous Sequential Circuits; Asynchronous or Event Driven Sequential Circuits; Counters; Problems; REFERENCES; Chapter 4. Number Representation in Computers; Number Systems; Conversion of Numbers to other Bases; The Binary Number System; Decimal Codes; Gray Code; Signed Numbers; Negative Numbers represented in Complementary Form; Comparison of One's and Two's Complement systems; Binary Coded Decimal Arithmetic; Choice of the Operating Base for the Processor; Representation of Symbolic Data; Problems; REFERENCES.
- Chapter 5. Addition and SubtractionTerms used in Describing Arithmetic Functions; The Half Adder; The Full Adder; Serial Binary Addition; Parallel Binary Addition; Detection of Carry Completion; The Carry Lookahead Adder; The Carry Skip Adder; Other High Speed Adders; Binary Coded Decimal Adders; Serial Binary Coded Adders; Decimal Addition by Look-Up Table; Binary Coded Decimal Subtraction; Binary to Decimal Converters; Problems; REFERENCES; Chapter 6. Multiplication and Division; The Serial Binary Multiplier; The Parallel Binary Multiplier.
- Multiplication of Signed Numbers in Two's ComplementBooth's Method; Multiplication in Binary Coded Decimal by Count Down; Multiplication in Binary Coded Decimal by Halving and Doubling; High Speed Binary Multiplication; Reduction of the Average Time by the Carry Save Method; Multiplier Recoding with Uniform Shifts; Multiplication with Variable Shifting; Array Multipliers; Division
- The Restoring Method; Non-Performing Division; Non-Restoring Division; Division by an Iterative Method; Large Scale Integrated Arithmetic Units; Problems; REFERENCES; Chapter 7. Computer Memories; Terminology.
- Hierarchy of MemoriesSemiconductor Memories; The Static RAM; The Dynamic RAM; Read Only Memory; Linear Memories and Shift Registers; Charge Coupled Devices; Magnetic Bubble Memories; Magnetic Surface Storage Systems; Magnetic Disc Storage; Magnetic Tape Storage; Floppy Discs; REFERENCES; Chapter 8. Functional Description of a Small Processor; Memory Features; Word Size; Number Formats; Memory Reference Instructions; Arithmetic and Logical Instructions; Arithmetic and Logical Functions; Multiplication and Division; Some Instructions Found on Other Machines; Problems.