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Advances in computers. Volume ninety two /
Since its first volume in 1960, Advances in Computers has presented detailed coverage of innovations in computer hardware, software, theory, design, and applications. It has also provided contributors with a medium in which they can explore their subjects in greater depth and breadth than journal ar...
| Clasificación: | Libro Electrónico |
|---|---|
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Waltham, Massachusetts :
Academic Press,
2014.
|
| Colección: | Advances in computers ;
Volume 92 |
| Temas: | |
| Acceso en línea: | Texto completo Texto completo |
MARC
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| 245 | 0 | 0 | |a Advances in computers. |n Volume ninety two / |c edited by Ali Hurson. |
| 264 | 1 | |a Waltham, Massachusetts : |b Academic Press, |c 2014. | |
| 264 | 4 | |c �2014 | |
| 300 | |a 1 online resource (289 pages) | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 0 | |a Advances in computers ; |v Volume 92 | |
| 500 | |a Includes indexes. | ||
| 588 | 0 | |a Online resource; title from PDF title page (ebrary, viewed February 4, 2014). | |
| 520 | |a Since its first volume in 1960, Advances in Computers has presented detailed coverage of innovations in computer hardware, software, theory, design, and applications. It has also provided contributors with a medium in which they can explore their subjects in greater depth and breadth than journal articles usually allow. As a result, many articles have become standard references that continue to be of significant, lasting value in this rapidly expanding field. | ||
| 505 | 0 | |a Front Cover; Advances in Computers; Copyright; Contents; Preface; Chapter One: Register-Level Communication in Speculative Chip Multiprocessors; 1. Introduction; 2. TLS in CMPs; 3. Register Communication Mechanisms in Speculative CMPs; 3.1. Speculative CMPs with Distributed Register File; 3.1.1. Ring-Based Distributed Register File Approaches; 3.1.1.1. Multiscalar; 3.1.1.1.1. General Data; 3.1.1.1.2. Architecture Details; 3.1.1.1.3. Register Communication; 3.1.1.2. Multiplex; 3.1.1.2.1. General Data; 3.1.1.2.2. Architecture Details; 3.1.1.2.3. Register Communication; 3.1.1.3. SM | |
| 505 | 8 | |a 3.1.1.3.1. General Data3.1.1.3.2. Architecture Details; 3.1.1.3.3. Register Communication; 3.1.1.4. Atlas; 3.1.1.4.1. General Data; 3.1.1.4.2. Architecture Details; 3.1.1.4.3. Register Communication; 3.1.1.5. NEKO; 3.1.1.5.1. General Data; 3.1.1.5.2. Architecture Details; 3.1.1.5.3. Register Communication; 3.1.1.6. Pinot; 3.1.1.6.1. General Data; 3.1.1.6.2. Architecture Details; 3.1.1.6.3. Register Communication; 3.1.2. Bus-Based Distributed Register File Approaches; 3.1.2.1. IACOMA; 3.1.2.1.1. General Data; 3.1.2.1.2. Architecture Details; 3.1.2.1.3. Register Communication | |
| 505 | 8 | |a 3.2. Speculative CMPs with GRF and Distributed Register Files3.2.1. Trace; 3.2.1.1. General Data; 3.2.1.2. Architecture Details; 3.2.1.3. Register Communication; 3.2.2. Mitosis; 3.2.2.1. General Data; 3.2.2.2. Architecture Details; 3.2.2.3. Register Communication; 3.3. Speculative CMPs with GRF; 3.3.1. MP98 (Merlot); 3.3.1.1. General Data; 3.3.1.2. Architecture Details; 3.3.1.3. Register Communication; 3.3.2. MAJC; 3.3.2.1. General Data; 3.3.2.2. Architecture Details; 3.3.2.3. Register Communication; 4. Comparative Analysis of Register Communication Issues in TLS CMPs | |
| 505 | 8 | |a 4.1. Thread Identification and Speculation Scope4.1.1. Thread Identification; 4.1.2. Speculation Scope; 4.2. Register Communication Mechanisms; 4.2.1. Speculative Register Value Transfer; 4.2.2. Prediction of Register Values; 4.2.3. Nonspeculative Register Value Transfer; 4.3. Misspeculation Recovery; 4.3.1. Dependency Violation; 4.3.2. Misprediction; 4.4. Performance and Scalability; 4.4.1. Performance Issues; 4.4.2. Register File Organization; 4.4.3. Register Bypass Network; 4.4.4. Speculative CMP Versus Single Processor; 4.4.5. Scalability Issues; 4.4.5.1. Register File Organization | |
| 505 | 8 | |a 4.4.5.2. Support for Register Communication4.4.5.3. Register Bypass Network; 5. Case Study: SIC and ESIC Protocols; 5.1. SIC Protocol; 5.1.1. SIC Software Support; 5.1.2. SIC Hardware Support; 5.1.3. Description of SIC Protocol; 5.1.4. Thread Initiation and Completion; 5.2. ESIC Protocol; 5.2.1. ESIC Software Support; 5.2.2. ESIC Hardware Support; 5.2.3. Description of ESIC Protocol; 5.2.4. Thread Initiation, Completion, and Squashing; 5.3. SIC Versus ESIC; 6. Conclusion; Acknowledgments; References | |
| 504 | |a Includes bibliographical references and indexes. | ||
| 546 | |a English. | ||
| 650 | 0 | |a Electronic data processing. | |
| 650 | 7 | |a COMPUTERS |x Computer Literacy. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Computer Science. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Data Processing. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Hardware |x General. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Information Technology. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Machine Theory. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Reference. |2 bisacsh | |
| 650 | 7 | |a Electronic data processing |2 fast |0 (OCoLC)fst00906956 | |
| 700 | 1 | |a Hurson, Ali. | |
| 776 | 0 | 8 | |i Print version: |t Advances in computers. Volume ninety two. |d Waltham, Massachusetts : Academic Press, �2014 |h viii, 280 pages |k Advances in computers ; Volume 92 |x 0065-2458 |z 9780124202320 |
| 856 | 4 | 0 | |u https://sciencedirect.uam.elogim.com/science/book/9780124202320 |z Texto completo |
| 856 | 4 | 0 | |u https://sciencedirect.uam.elogim.com/science/bookseries/00652458/92 |z Texto completo |