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Digital design and computer architecture /
Digital Design and Computer Architecture takes a unique and modern approach to digital design. Beginning with digital logic gates and progressing to the design of combinational and sequential circuits, Harris and Harris use these fundamental building blocks as the basis for what follows: the design...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Amsterdam ; Boston :
Elsevier/Morgan Kaufmann,
�2012.
|
| Edición: | 2nd ed. |
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
| LEADER | 00000cam a2200000Ma 4500 | ||
|---|---|---|---|
| 001 | SCIDIR_ocn808340838 | ||
| 003 | OCoLC | ||
| 005 | 20231117044740.0 | ||
| 006 | m o d | ||
| 007 | cr cn||||||||| | ||
| 008 | 120810s2012 ne a ob 001 0 eng d | ||
| 040 | |a E7B |b eng |e pn |c E7B |d OCLCO |d N$T |d UIU |d YDXCP |d EBLCP |d OPELS |d OCLCQ |d OCLCF |d OCLCQ |d TEFOD |d UIU |d VT2 |d TEFOD |d OCLCQ |d DEBSZ |d COO |d OCLCQ |d UAB |d OCLCQ |d OL$ |d CNCEN |d C6I |d ERF |d UKBTH |d UHL |d OCLCQ |d OCLCO |d OCLCQ |d OCLCA |d FZL |d OCLCQ | ||
| 019 | |a 808077192 |a 889214752 |a 1040648856 |a 1105778491 |a 1105797942 |a 1112567059 |a 1112567298 |a 1113769678 |a 1113797271 |a 1113798894 |a 1159609976 |a 1159650104 |a 1351601319 | ||
| 020 | |a 9780123978165 |q (electronic bk.) | ||
| 020 | |a 0123978165 |q (electronic bk.) | ||
| 020 | |z 9780123944245 | ||
| 020 | |z 0123944244 | ||
| 020 | |a 1283717158 | ||
| 020 | |a 9781283717151 | ||
| 024 | 8 | |a C20110043776 | |
| 024 | 8 | |a 9780123944245 | |
| 035 | |a (OCoLC)808340838 |z (OCoLC)808077192 |z (OCoLC)889214752 |z (OCoLC)1040648856 |z (OCoLC)1105778491 |z (OCoLC)1105797942 |z (OCoLC)1112567059 |z (OCoLC)1112567298 |z (OCoLC)1113769678 |z (OCoLC)1113797271 |z (OCoLC)1113798894 |z (OCoLC)1159609976 |z (OCoLC)1159650104 |z (OCoLC)1351601319 | ||
| 050 | 4 | |a TK7868.D5 |b H34 2012eb | |
| 072 | 7 | |a TEC |x 008060 |2 bisacsh | |
| 072 | 7 | |a TEC |x 008070 |2 bisacsh | |
| 082 | 0 | 4 | |a 621.381 |2 22 |
| 100 | 1 | |a Harris, David Money. | |
| 245 | 1 | 0 | |a Digital design and computer architecture / |c David Money Harris, Sarah L. Harris. |
| 250 | |a 2nd ed. | ||
| 260 | |a Amsterdam ; |a Boston : |b Elsevier/Morgan Kaufmann, |c �2012. | ||
| 300 | |a 1 online resource (xxiv, 690 pages :) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file | ||
| 504 | |a Includes bibliographical references and index. | ||
| 520 | |a Digital Design and Computer Architecture takes a unique and modern approach to digital design. Beginning with digital logic gates and progressing to the design of combinational and sequential circuits, Harris and Harris use these fundamental building blocks as the basis for what follows: the design of an actual MIPS processor. SystemVerilog and VHDL are integrated throughout the text in examples illustrating the methods and techniques for CAD-based circuit design. By the end of this book, readers will be able to build their own microprocessor and will have a top-to-bottom understanding of how it works. Harris and Harris have combined an engaging and humorous writing style with an updated and hands-on approach to digital design. This second edition has been updated with new content on I/O systems in the context of general purpose processors found in a PC as well as microcontrollers found almost everywhere. The new edition provides practical examples of how to interface with peripherals using RS232, SPI, motor control, interrupts, wireless, and analog-to-digital conversion. High-level descriptions of I/O interfaces found in PCs include USB, SDRAM, WiFi, PCI Express, and others. In addition to expanded and updated material throughout, SystemVerilog is now featured in the programming and code examples (replacing Verilog), alongside VHDL. This new edition also provides additional exercises and a new appendix on C programming to strengthen the connection between programming and processor architecture. SECOND Edition Features Covers the fundamentals of digital logic design and reinforces logic concepts through the design of a MIPS microprocessor. Features side-by-side examples of the two most prominent Hardware Description Languages (HDLs)-SystemVerilog and VHDL-which illustrate and compare the ways each can be used in the design of digital systems. Includes examples throughout the text that enhance the reader's understanding and retention of key concepts and techniques.Companion Web site includes links to CAD tools for FPGA design from Altera and Mentor Graphics, lecture slides, laboratory projects, and solutions to exercises. Updated based on instructor feedback with more exercises and new examples of parallel and advanced architectures, practical I/O applications, embedded systems, and heterogeneous computing Presents digital system design examples in both VHDL and SystemVerilog (updated for the second edition from Verilog), shown side-by-side to compare and contrast their strengthsIncludes a new chapter on C programming to provide necessary prerequisites and strengthen the connection between programming and processor architectureCompanion Web site includes links to Xilinx CAD tools for FPGA design, lecture slides, laboratory projects, and solutions to exercises. Instructors can also register at textbooks.elsevier.com for access to: Solutions to all exercises (PDF)Lab materials with solutionsHDL for textbook examples and exercise solutions Lecture slides (PPT)Sample exams\Sample course syllabusFigures from the text (JPG, PPT). | ||
| 542 | |f Copyright: Elsevier Science & Technology |g 2013 | ||
| 542 | |f Copyright ©: Elsevier Science & Technology |g 2013 | ||
| 505 | 0 | |a Front Cover; In Praise of Digital Designand Computer Architecture; About the Authors; Digital Design and Computer Architecture; Copyright; Dedication; Table of Contents; Preface; Features; Side-by-Side Coverage of SystemVerilog and VHDL; Classic MIPS Architecture and Microarchitecture; Real-World Perspectives; Accessible Overview of Advanced Microarchitecture; End-of-Chapter Exercises and Interview Questions; Online Supplements; How to Use the Software Tools in A Course; Altera Quartus II; Microchip MPLAB IDE; Optional Tools: Synplify Premier and QtSpim; Labs; Bugs; Acknowledgments | |
| 505 | 8 | |a 1 From Zero to One1.1 The Game Plan; 1.2 The Art of Managing Complexity; 1.2.1 Abstraction; 1.2.2 Discipline; 1.2.3 The Three-Y's; 1.3 The Digital Abstraction; 1.4 Number Systems; 1.4.1 Decimal Numbers; 1.4.2 Binary Numbers; 1.4.3 Hexadecimal Numbers; 1.4.4 Bytes, Nibbles, and All That Jazz; 1.4.5 Binary Addition; 1.4.6 Signed Binary Numbers; Sign/Magnitude Numbers; Two's Complement Numbers; Comparison of Number Systems; 1.5 Logic Gates; 1.5.1 NOT Gate; 1.5.2 Buffer; 1.5.3 AND Gate; 1.5.4 OR Gate; 1.5.5 Other Two-Input Gates; 1.5.6 Multiple-Input Gates; 1.6 Beneath the Digital Abstraction | |
| 505 | 8 | |a 1.6.1 Supply Voltage1.6.2 Logic Levels; 1.6.3 Noise Margins; 1.6.4 DC Transfer Characteristics; 1.6.5 The Static Discipline; 1.7 CMOS Transistors*; 1.7.1 Semiconductors; 1.7.2 Diodes; 1.7.3 Capacitors; 1.7.4 nMOS and pMOS Transistors; 1.7.5 CMOS NOT Gate; 1.7.6 Other CMOS Logic Gates; 1.7.7 Transmission Gates; 1.7.8 Pseudo-nMOS Logic; 1.8 Power Consumption*; 1.9 Summary and a Look Ahead; Exercises; Interview Questions; 2 Combinational Logic Design; 2.1 Introduction; 2.2 Boolean Equations; 2.2.1 Terminology; 2.2.2 Sum-of-Products Form; 2.2.3 Product-of-Sums Form; 2.3 Boolean Algebra | |
| 505 | 8 | |a 2.3.1 Axioms2.3.2 Theorems of One Variable; 2.3.3 Theorems of Several Variables; 2.3.4 The Truth Behind It All; 2.3.5 Simplifying Equations; 2.4 From Logic to Gates; 2.5 Multilevel Combinational Logic; 2.5.1 Hardware Reduction; 2.5.2 Bubble Pushing; 2.6 X's and Z's, Oh My; 2.6.1 Illegal Value: X; 2.6.2 Floating Value: Z; 2.7 Karnaugh Maps; 2.7.1 Circular Thinking; 2.7.2 Logic Minimization with K-Maps; 2.7.3 Don't Cares; 2.7.4 The Big Picture; 2.8 Combinational Building Blocks; 2.8.1 Multiplexers; 2:1 Multiplexer; Wider Multiplexers; Multiplexer Logic; 2.8.2 Decoders; Decoder Logic; 2.9 Timing | |
| 505 | 8 | |a 2.9.1 Propagation and Contamination Delay2.9.2 Glitches; 2.10 Summary; Exercises; Interview Questions; 3 Sequential Logic Design; 3.1 Introduction; 3.2 Latches and Flip-Flops; 3.2.1 SR Latch; 3.2.2 D Latch; 3.2.3 D FIip-Flop; 3.2.4 Register; 3.2.5 Enabled Flip-Flop; 3.2.6 Resettable Flip-Flop; 3.2.7 Transistor-Level Latch and Flip-Flop Designs*; 3.2.8 Putting It All Together; 3.3 Synchronous Logic Design; 3.3.1 Some Problematic Circuits; 3.3.2 Synchronous Sequential Circuits; 3.3.3 Synchronous and Asynchronous Circuits; 3.4 Finite State Machines; 3.4.1 FSM Design Example | |
| 546 | |a English. | ||
| 650 | 0 | |a Digital electronics. | |
| 650 | 0 | |a Logic design. | |
| 650 | 0 | |a Computer architecture. | |
| 650 | 6 | |a �Electronique num�erique. |0 (CaQQLa)201-0021882 | |
| 650 | 6 | |a Structure logique. |0 (CaQQLa)201-0068520 | |
| 650 | 6 | |a Ordinateurs |x Architecture. |0 (CaQQLa)201-0015834 | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Digital. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Microelectronics. |2 bisacsh | |
| 650 | 7 | |a Computer architecture. |2 fast |0 (OCoLC)fst00872026 | |
| 650 | 7 | |a Digital electronics. |2 fast |0 (OCoLC)fst00893670 | |
| 650 | 7 | |a Logic design. |2 fast |0 (OCoLC)fst01002045 | |
| 700 | 1 | |a Harris, Sarah L. | |
| 776 | 0 | 8 | |i Print version: |a Harris, David Money. |t Digital design and computer architecture. |b 2nd ed. |d Amsterdam ; Boston : Elsevier/Morgan Kaufmann, �2012 |w (DLC) 2012554037 |
| 856 | 4 | 0 | |u https://sciencedirect.uam.elogim.com/science/book/9780123944245 |z Texto completo |