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Logic design for array-based circuits : a structured design methodology /
This book will show you how to approach the design covering everything from the circuit specification to the final design acceptance, including what support you can expect, sizing, timing analysis, power and packaging, various simulations, design verification, and design submission.
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
San Diego :
Academic Press,
�1992.
|
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
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| 020 | |z 0127466606 | ||
| 020 | |z 9780127466606 | ||
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| 035 | |a (OCoLC)645816144 |z (OCoLC)297357293 | ||
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| 050 | 4 | |a TK7874.6 |b .W45 1992 | |
| 082 | 0 | 4 | |a 621.3815 |2 20 |
| 084 | |a ELT 360f |2 stub | ||
| 100 | 1 | |a White, Donnamaie E., |d 1942- | |
| 245 | 1 | 0 | |a Logic design for array-based circuits : |b a structured design methodology / |c D.E. White. |
| 260 | |a San Diego : |b Academic Press, |c �1992. | ||
| 300 | |a 1 online resource (xxii, 342 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 504 | |a Includes bibliographical references (pages 331-332) and index. | ||
| 506 | |3 Use copy |f Restrictions unspecified |2 star |5 MiAaHDL | ||
| 533 | |a Electronic reproduction. |b [Place of publication not identified] : |c HathiTrust Digital Library, |d 2010. |5 MiAaHDL | ||
| 538 | |a Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002. |u http://purl.oclc.org/DLF/benchrepro0212 |5 MiAaHDL | ||
| 583 | 1 | |a digitized |c 2010 |h HathiTrust Digital Library |l committed to preserve |2 pda |5 MiAaHDL | |
| 520 | |a This book will show you how to approach the design covering everything from the circuit specification to the final design acceptance, including what support you can expect, sizing, timing analysis, power and packaging, various simulations, design verification, and design submission. | ||
| 588 | 0 | |a Print version record. | |
| 650 | 0 | |a Application-specific integrated circuits |x Design and construction |x Data processing. | |
| 650 | 0 | |a Logic design |x Data processing. | |
| 650 | 6 | |a Structure logique |x Informatique. |0 (CaQQLa)201-0060782 | |
| 650 | 7 | |a Application-specific integrated circuits |x Design and construction |x Data processing |2 fast |0 (OCoLC)fst00811724 | |
| 650 | 7 | |a Logic design |x Data processing |2 fast |0 (OCoLC)fst01002048 | |
| 650 | 7 | |a Entwurf |2 gnd |0 (DE-588)4121208-3 | |
| 650 | 7 | |a Kundenspezifische Schaltung |2 gnd |0 (DE-588)4122250-7 | |
| 653 | 0 | |a Digital circuits |a Logic design | |
| 776 | 0 | 8 | |i Print version: |w (DLC) 92005084 |w (OCoLC)25410341 |
| 856 | 4 | 0 | |u https://sciencedirect.uam.elogim.com/science/book/9780127466606 |z Texto completo |