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Algorithm-structured computer arrays and networks : architectures and processes for images, percepts, models, information /
Algorithm-Structured Computer Arrays and Networks.
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Orlando :
Academic Press,
1984.
|
| Colección: | Computer science and applied mathematics.
|
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
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| 100 | 1 | |a Uhr, Leonard Merrick, |d 1927- | |
| 245 | 1 | 0 | |a Algorithm-structured computer arrays and networks : |b architectures and processes for images, percepts, models, information / |c Leonard Uhr. |
| 260 | |a Orlando : |b Academic Press, |c 1984. | ||
| 300 | |a 1 online resource (xxiii, 413 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a Computer science and applied mathematics | |
| 504 | |a Includes bibliographical references (pages 373-389). | ||
| 500 | |a Includes indexes. | ||
| 506 | |3 Use copy |f Restrictions unspecified |5 MiAaHDL |2 star | ||
| 533 | |a Electronic reproduction. |b [Place of publication not identified] : |c HathiTrust Digital Library, |d 2010. |5 MiAaHDL | ||
| 538 | |a Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002. |u http://purl.oclc.org/DLF/benchrepro0212 |5 MiAaHDL | ||
| 583 | 1 | |a digitized |c 2010 |h HathiTrust Digital Library |l committed to preserve |5 MiAaHDL |2 pda | |
| 588 | 0 | |a Print version record. | |
| 505 | 0 | |a Front Cover; Algorithm-Structured Computer Arrays and Networks: Architectures and Processes for Images, Percepts, Models, Information; Copyright Page; Table of Contents; Preface; Acknowledgments; PART I: AN INTRODUCTION TO COMPUTERS; Introduction: Toward Algorithm-Structured Architectures; Arrays and Networks of Large Numbers of Closely Coupled Computers; Toward Architectures That Mirror Algorithms' Information Flow; The Traditional Single 4 'Central Processing Unit"" Serial Computer; Problems for Which the One-CPU Serial Computer Is Inadequate | |
| 505 | 8 | |a Toward Developing Powerfully Structured Arrays and NetworksVery Large-Scale Integration (VLSI) and Very Large Networks; Steps toward Efficient, Powerful Algorithm-Structured Architectures; Chapter 1. Conventional Computers and Loosely Distributed Networks; General-Purpose Computers and Turing Machines; The General-Purpose Single-Processor Serial Computer Described; How Computers Actually Work; Graphs, Automata, Petri Nets, Information Flow, Network Flow; Parallel Hardware Additions for Super (Traditional) Computers; Networks of Loosely Coupled Distributed Computers; Summary Discussion | |
| 505 | 8 | |a PART II: ARRAYS AND NETWORKS BUILT OR DESIGNEDChapter 2. First Attempts at Designing and Organizing Multicomputers; Mapping Process-Information Graph into Processor-Memory Network Flow; A Survey of Early (Pre-LSI) Multicomputer Arrays and Networks; Associative, Content-Addressable Memories (CAMs) and Logic-in-Memory; Super Multicomputers; Organizing Computers: Clocks, Controllers, Operating Systems; The Overall Coordination and Operation of a Multicomputer Network; Summary Discussion; Chapter 3. Large and Powerful Arrays and Pipelines | |
| 505 | 8 | |a The General Architecture of Parallel Cellular Array ComputersThe Very Large LSI Parallel-Array Computer; An Examination of Today's Very Large Arrays; Pipelines of Processors; Systems That Combine Array, Pipeline, and Specialized Hardware; Summary Discussion: Arrays, Pipelines, Parallelism, VLSI; Chapter 4. More or Less Tightly Coupled Networks; Simple Structures: Buses, Rings, and Cross-Point Switches; Lattices, TV-Cubes, Trees, and Stars; Augmenting Trees for Density, Connectivity, and Structure; Miscellaneous Interconnection Patterns; Reconfiguring Network Topologies and Component Parts | |
| 505 | 8 | |a Network-Structured Programs and AlgorithmsSummary Discussion and Preliminary Comparisons; Chapter 5. Parallel Parallel Computers; The Great Variety of Possible Array, Pipeline, and Network Structures; The Value of a Parallel Set of Parallel Resources; Suggested Requirements for Parallel Parallel Systems; Summary and Conclusions; Chapter 6. Converging Pyramids of Arrays; A Pipeline of Converging Stacked Arrays; An Example of a Potentially Powerful yet Economical Pyramid; A Combined Array/Network Architecture; Possible Mixtures of N-Bit Processors; Summary Discussion | |
| 520 | |a Algorithm-Structured Computer Arrays and Networks. | ||
| 650 | 0 | |a Parallel processing (Electronic computers) | |
| 650 | 0 | |a Computer networks. | |
| 650 | 0 | |a Computer architecture. | |
| 650 | 2 | |a Computer Communication Networks |0 (DNLM)D003195 | |
| 650 | 6 | |a Parall�elisme (Informatique) |0 (CaQQLa)201-0057785 | |
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| 653 | |a Digital computer systems |a Parallel-processor systems | ||
| 776 | 0 | 8 | |i Print version: |a Uhr, Leonard Merrick, 1927- |t Algorithm-structured computer arrays and networks. |d Orlando : Academic Press, 1984 |w (DLC) 82008878 |w (OCoLC)8495168 |
| 830 | 0 | |a Computer science and applied mathematics. | |
| 856 | 4 | 0 | |u https://sciencedirect.uam.elogim.com/science/book/9780127069609 |z Texto completo |