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Interconnection networks : an engineering approach /
The performance of most digital systems today is limited by their communication or interconnection, not by their logic or memory. As designers strive to make more efficient use of scarce interconnection bandwidth, interconnection networks are emerging as a nearly universal solution to the system-lev...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Otros Autores: | , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
San Francisco, CA :
Morgan Kaufmann,
�2003.
|
| Edición: | Rev. print. |
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
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|---|---|---|---|
| 001 | SCIDIR_ocm52616057 | ||
| 003 | OCoLC | ||
| 005 | 20231117014812.0 | ||
| 006 | m o d | ||
| 007 | cr cn||||||||| | ||
| 008 | 030715s2003 caua ob 001 0 eng d | ||
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| 019 | |a 162129883 |a 648331019 | ||
| 020 | |a 058545745X |q (electronic bk.) | ||
| 020 | |a 9780585457451 |q (electronic bk.) | ||
| 020 | |a 9781558608528 | ||
| 020 | |a 1558608524 | ||
| 035 | |a (OCoLC)52616057 |z (OCoLC)162129883 |z (OCoLC)648331019 | ||
| 050 | 4 | |a TK5105.5 |b .D78 2003eb | |
| 072 | 7 | |a COM |x 043060 |2 bisacsh | |
| 072 | 7 | |a COM |x 020000 |2 bisacsh | |
| 082 | 0 | 4 | |a 004.6 |2 21 |
| 100 | 1 | |a Duato, Jos�e. | |
| 245 | 1 | 0 | |a Interconnection networks : |b an engineering approach / |c Jos�e Duato, Sudhakar Yalamanchili, Lionel Ni. |
| 250 | |a Rev. print. | ||
| 260 | |a San Francisco, CA : |b Morgan Kaufmann, |c �2003. | ||
| 300 | |a 1 online resource (xxiii, 600 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 504 | |a Includes bibliographical references (pages 569-592) and index. | ||
| 588 | 0 | |a Print version record. | |
| 505 | 0 | |a Foreword -- Foreword to the First Printing -- Preface -- Chapter 1 -- Introduction -- Chapter 2 -- Message Switching Layer -- Chapter 3 -- Deadlock, Livelock, and Starvation -- Chapter 4 -- Routing Algorithms -- Chapter 5 -- CollectiveCommunicationSupport -- Chapter 6 -- Fault-Tolerant Routing -- Chapter 7 -- Network Architectures -- Chapter 8 -- Messaging Layer Software -- Chapter 9 -- Performance Evaluation -- Appendix A -- Formal Definitions for Deadlock Avoidance -- Appendix B -- Acronyms -- References -- Index. | |
| 520 | |a The performance of most digital systems today is limited by their communication or interconnection, not by their logic or memory. As designers strive to make more efficient use of scarce interconnection bandwidth, interconnection networks are emerging as a nearly universal solution to the system-level communication problems for modern digital systems. Interconnection networks have become pervasive in their traditional application as processor-memory and processor-processor interconnect. Point-to-point interconnection networks have replaced buses in an ever widening range of applications that include on-chip interconnect, switches and routers, and I/O systems. In this book, the authors present in a structured way the basic underlying concepts of most interconnection networks and provide representative solutions that have been implemented in the industry or proposed in the research literature. * Gives a coherent, comprehensive treatment of the entire field * Presents a formal statement of the basic concepts, alternative design choices, and design trade-offs * Provides thorough classifications, clear descriptions, accurate definitions, and unified views to structure the knowledge on interconnection networks * Focuses on issues critical to designers. | ||
| 650 | 0 | |a Computer networks. | |
| 650 | 0 | |a Multiprocessors. | |
| 650 | 6 | |a R�eseaux d'ordinateurs. |0 (CaQQLa)201-0007877 | |
| 650 | 6 | |a Multiprocesseurs. |0 (CaQQLa)201-0062858 | |
| 650 | 7 | |a COMPUTERS |x Networking |x Vendor Specific. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Data Transmission Systems |x General. |2 bisacsh | |
| 650 | 7 | |a Computer networks. |2 fast |0 (OCoLC)fst00872297 | |
| 650 | 7 | |a Multiprocessors. |2 fast |0 (OCoLC)fst01029068 | |
| 650 | 7 | |a Redes de computadores. |2 larpcal | |
| 650 | 7 | |a Arquitetura e organiza�c�ao de computadores. |2 larpcal | |
| 700 | 1 | |a Yalamanchili, Sudhakar. | |
| 700 | 1 | |a Ni, Lionel M. | |
| 776 | 0 | 8 | |i Print version: |a Duato, Jos�e. |t Interconnection networks. |b Rev. print. |d San Francisco, CA : Morgan Kaufmann, �2003 |z 1558608524 |w (DLC) 2002104300 |w (OCoLC)50303168 |
| 856 | 4 | 0 | |u https://sciencedirect.uam.elogim.com/science/book/9781558608528 |z Texto completo |