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Machine learning for VLSI chip design /

MACHINE LEARNING TECHNIQUES FOR VLSI CHIP DESIGN This cutting-edge new volume covers the hardware architecture implementation, the software implementation approach, the efficient hardware of machine learning applications with FPGA or CMOS circuits, and many other aspects and applications of machine...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Otros Autores: Kumar, Abhishek (Editor ), Tripathi, Suman Lata (Editor ), Srinivasa Rau, K. (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Hoboken, NJ : Beverly, MA : Wiley ; Scrivener Publishing, 2023.
Temas:
Acceso en línea:Texto completo (Requiere registro previo con correo institucional)

MARC

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024 7 |a 10.1002/9781119910497  |2 doi 
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037 |a 9781119910398  |b O'Reilly Media 
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245 0 0 |a Machine learning for VLSI chip design /  |c edited by Abhishek Kumar, Suman Lata Tripathi and K. Srinivasa Rao. 
246 3 |a Machine learning for very-large-scale integration chip design 
264 1 |a Hoboken, NJ :  |b Wiley ;  |a Beverly, MA :  |b Scrivener Publishing,  |c 2023. 
300 |a 1 online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
505 0 |a Applications of VLSI Design in Artificial Intelligence and Machine Learning / Imran Ullah Khan, Nupur Mittal, Mohd Amir Ansari -- Design of an Accelerated Squarer Architecture Based on Yavadunam Sutra for Machine Learning / AV Ananthalakshmi, P Divyaparameswari, P Kanimozhi -- Machine Learning-Based VLSI Test and Verification / Jyoti Kandpal -- IoT-Based Smart Home Security Alert System for Continuous Supervision / Rajeswari, N Vinod Kumar, K M Suresh, N Sai Kumar, K Girija Sravani -- A Detailed Roadmap from Conventional-MOSFET to Nanowire-MOSFET / P Kiran Kumar, B Balaji, M Suman, P Syam Sundar, E Padmaja, K Girija Sravani -- Gate All Around MOSFETs-A Futuristic Approach / Ritu Yadav, Kiran Ahuja -- Investigation of Diabetic Retinopathy Level Based on Convolution Neural Network Using Fundus Images / K Sasi Bhushan, U Preethi, P Naga Sai Navya, R Abhilash, T Pavan, K Girija Sravani -- Anti-Theft Technology of Museum Cultural Relics Using RFID Technology / B Ramesh Reddy, K Bhargav Manikanta, PVVNS Jaya Sai, R Mohan Chandra, M Greeshma Vyas, K Girija Sravani -- Smart Irrigation System Using Machine Learning Techniques / B V Anil Sai Kumar, Suryavamsham Prem Kumar, Konduru Jaswanth, Kola Vishnu, Abhishek Kumar -- Design of Smart Wheelchair with Health Monitoring System / Narendra Babu Alur, Kurapati Poorna Durga, Boddu Ganesh, Manda Devakaruna, Lakkimsetti Nandini, A Praneetha, T Satyanarayana, K Girija Sravani -- Design and Analysis of Anti-Poaching Alert System for Red Sandalwood Safety / K Rani Rudrama, Mounika Ramala, Poorna sasank Galaparti, Manikanta Chary Darla, Siva Sai Prasad Loya, K Srinivasa Rao -- Tumor Detection Using Morphological Image Segmentation with DSP Processor TMS320C6748 / T Anil Raju, K Srihari Reddy, Sk Arifulla Rabbani, G Suresh, K Saikumar Reddy, K Girija Sravani -- Design Challenges for Machine/Deep Learning Algorithms / Rajesh C Dharmik, Bhushan U Bawankar. 
504 |a Includes bibliographical references and index. 
588 |a Description based on online resource; title from digital title page (viewed on August 02, 2023). 
520 |a MACHINE LEARNING TECHNIQUES FOR VLSI CHIP DESIGN This cutting-edge new volume covers the hardware architecture implementation, the software implementation approach, the efficient hardware of machine learning applications with FPGA or CMOS circuits, and many other aspects and applications of machine learning techniques for VLSI chip design. Artificial intelligence (AI) and machine learning (ML) have, or will have, an impact on almost every aspect of our lives and every device that we own. AI has benefitted every industry in terms of computational speeds, accurate decision prediction, efficient machine learning (ML), and deep learning (DL) algorithms. The VLSI industry uses the electronic design automation tool (EDA), and the integration with ML helps in reducing design time and cost of production. Finding defects, bugs, and hardware Trojans in the design with ML or DL can save losses during production. Constraints to ML-DL arise when having to deal with a large set of training datasets. This book covers the learning algorithm for floor planning, routing, mask fabrication, and implementation of the computational architecture for ML-DL. The future aspect of the ML-DL algorithm is to be available in the format of an integrated circuit (IC). A user can upgrade to the new algorithm by replacing an IC. This new book mainly deals with the adaption of computation blocks like hardware accelerators and novel nano-material for them based upon their application and to create a smart solution. This exciting new volume is an invaluable reference for beginners as well as engineers, scientists, researchers, and other professionals working in the area of VLSI architecture development. 
590 |a O'Reilly  |b O'Reilly Online Learning: Academic/Public Library Edition 
650 0 |a Integrated circuits  |x Very large scale integration  |x Design  |x Data processing. 
650 0 |a Machine learning. 
700 1 |a Kumar, Abhishek,  |e editor. 
700 1 |a Tripathi, Suman Lata,  |e editor. 
700 1 |a Srinivasa Rau, K.,  |e editor. 
856 4 0 |u https://learning.oreilly.com/library/view/~/9781119910398/?ar  |z Texto completo (Requiere registro previo con correo institucional) 
994 |a 92  |b IZTAP