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00000cam a2200000Ii 4500 |
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OR_ocn926045935 |
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OCoLC |
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20231017213018.0 |
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m o d |
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cr unu|||||||| |
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151022s2016 enka ob 001 0 eng d |
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|a UMI
|b eng
|e rda
|e pn
|c UMI
|d OCLCF
|d CEF
|d INT
|d OCLCQ
|d UAB
|d VLB
|d OCLCO
|d OCLCQ
|d OCLCO
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|z 9780080971292
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|a 9780080971360
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|a 0080971369
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1 |
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|a GBVCP
|b 897158954
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1 |
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|a AU@
|b 000061145380
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|a (OCoLC)926045935
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|a CL0500000662
|b Safari Books Online
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|a TK7895.G36
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|a UAMI
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100 |
1 |
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|a Wilson, Peter R.
|q (Peter Reid),
|e author.
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245 |
1 |
0 |
|a Design recipes for FPGAs :
|b using Verilog and VHDL /
|c Peter Wilson.
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246 |
3 |
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|a Design recipes for field-programmable gate arrays
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250 |
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|a Second edition.
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264 |
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1 |
|a London, UK :
|b Newnes,
|c 2016.
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300 |
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|a 1 online resource (1 volume) :
|b illustrations
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336 |
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|a text
|b txt
|2 rdacontent
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337 |
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|a computer
|b c
|2 rdamedia
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338 |
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|a online resource
|b cr
|2 rdacarrier
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588 |
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|a Description based on online resource; title from title page (Safari, viewed October 19, 2015).
|
504 |
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|a Includes bibliographical references and index.
|
590 |
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|a O'Reilly
|b O'Reilly Online Learning: Academic/Public Library Edition
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650 |
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0 |
|a Field programmable gate arrays.
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650 |
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0 |
|a Verilog (Computer hardware description language)
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650 |
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0 |
|a VHDL (Computer hardware description language)
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650 |
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6 |
|a Réseaux logiques programmables par l'utilisateur.
|
650 |
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6 |
|a Verilog (Langage de description de matériel informatique)
|
650 |
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6 |
|a VHDL (Langage de description de matériel informatique)
|
650 |
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7 |
|a Field programmable gate arrays
|2 fast
|
650 |
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7 |
|a Verilog (Computer hardware description language)
|2 fast
|
650 |
|
7 |
|a VHDL (Computer hardware description language)
|2 fast
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856 |
4 |
0 |
|u https://learning.oreilly.com/library/view/~/9780080971360/?ar
|z Texto completo (Requiere registro previo con correo institucional)
|
994 |
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|a 92
|b IZTAP
|