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VLSI architectures for modern error-correcting codes /
Error-correcting codes are ubiquitous. They are adopted in almost every modern digital communication and storage system, such as wireless communications, optical communications, Flash memories, computer hard drives, sensor networks, and deep-space probing. New-generation and emerging applications de...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Boca Raton, FL :
CRC Press,
[2015]
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| Temas: | |
| Acceso en línea: | Texto completo (Requiere registro previo con correo institucional) |
MARC
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| 100 | 1 | |a Zhang, Xinmiao. | |
| 245 | 1 | 0 | |a VLSI architectures for modern error-correcting codes / |c Xinmiao Zhang. |
| 264 | 1 | |a Boca Raton, FL : |b CRC Press, |c [2015] | |
| 264 | 4 | |c ©20 | |
| 264 | 4 | |c ©2016 | |
| 300 | |a 1 online resource | ||
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| 504 | |a Includes bibliographical references. | ||
| 588 | 0 | |a Vendor-supplied metadata. | |
| 505 | 0 | |a Front Cover; Dedication; Contents; Preface; List Of Figures; List Of Tables; Chapter 1 Finite Field Arithmetic; Chapter 2 Vlsi Architecture Design Fundamentals; Chapter 3 Root Computations For Polynomials Overfinite Fields; Chapter 4 Reed-solomon Encoder & Hard-decision And Erasure Decoder Architectures; Chapter 5 Algebraic Soft-decision Reed-solomon Decoder Architectures; Chapter 6 Interpolation-based Chase And Generalized Minimum Distance Decoders; Chapter 7 Bch Encoder & Decoder Architectures; Chapter 8 Binary Ldpc Codes & Decoder Architectures. | |
| 505 | 8 | |a Chapter 9 Non-binary Ldpc Decoder ArchitecturesBibliography; Back Cover. | |
| 520 | |a Error-correcting codes are ubiquitous. They are adopted in almost every modern digital communication and storage system, such as wireless communications, optical communications, Flash memories, computer hard drives, sensor networks, and deep-space probing. New-generation and emerging applications demand codes with better error-correcting capability. On the other hand, the design and implementation of those high-gain error-correcting codes pose many challenges. They usually involve complex mathematical computations, and mapping them directly to hardware often leads to very high complexity. VLSI. | ||
| 590 | |a O'Reilly |b O'Reilly Online Learning: Academic/Public Library Edition | ||
| 650 | 0 | |a Error-correcting codes (Information theory) | |
| 650 | 0 | |a Integrated circuits |x Very large scale integration. | |
| 650 | 0 | |a Signal processing. | |
| 650 | 0 | |a Coding theory. | |
| 650 | 6 | |a Codes correcteurs d'erreurs (Théorie de l'information) | |
| 650 | 6 | |a Circuits intégrés à très grande échelle. | |
| 650 | 6 | |a Traitement du signal. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x VLSI & ULSI. |2 bisacsh | |
| 650 | 7 | |a Coding theory. |2 fast |0 (OCoLC)fst00866237 | |
| 650 | 7 | |a Error-correcting codes (Information theory) |2 fast |0 (OCoLC)fst00915036 | |
| 650 | 7 | |a Integrated circuits |x Very large scale integration. |2 fast |0 (OCoLC)fst00975602 | |
| 650 | 7 | |a Signal processing. |2 fast |0 (OCoLC)fst01118281 | |
| 776 | 0 | 8 | |i Print version: |a Zhang, Xinmiao. |t VLSI Architectures for Modern Error-Correcting Codes. |d Hoboken : CRC Press, ©2015 |z 9781482229646 |
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