The art of multiprocessor programming /

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Revised and updated with improvements conceived in parallel programming courses, The Art of Multiprocessor Programming is an authoritative guide to multicore programming. It introduces a higher level set of software development skills than that needed for efficient single-core programming. This book...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Herlihy, Maurice
Otros Autores: Shavit, Nir, 1959-
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Waltham, MA : Morgan Kaufmann, ©2012.
Edición:Rev. 1st ed.
Temas:
Multiprogramming (Electronic computers)
Multiprocessors.
Electronic books.
Multiprogrammation.
Multiprocesseurs.
Livres numériques.
e-books.
Multiprocessors
Acceso en línea:Texto completo (Requiere registro previo con correo institucional)
Tabla de Contenidos:
  • Front Cover; The Art of Multiprocessor Programming; Copyright; Dedication; Table of Contents; Acknowledgments; Preface; Suggested Ways to Teach the Art of Multiprocessor Programming; Preface; Practitioner Track; Non-CS Major Track; CS Major Track; 1 Introduction; 1.1 Shared Objects and Synchronization; 1.2 A Fable; 1.2.1 Properties of Mutual Exclusion; 1.2.2 The Moral; 1.3 The Producer-Consumer Problem; 1.4 The Readers-Writers Problem; 1.5 The Harsh Realities of Parallelization; 1.6 Parallel Programming; 1.7 Chapter Notes; 1.8 Exercises; I Principles; 2 Mutual Exclusion; 2.1 Time
  • 2.2 Critical Sections2.3 2-Thread Solutions; 2.3.1 The LockOne Class; 2.3.2 The LockTwo Class; 2.3.3 The Peterson Lock; 2.4 The Filter Lock; 2.5 Fairness; 2.6 Lamport's Bakery Algorithm; 2.7 Bounded Timestamps; 2.8 Lower Bounds on the Number of Locations; 2.9 Chapter Notes; 2.10 Exercises; 3 Concurrent Objects; 3.1 Concurrency and Correctness; 3.2 Sequential Objects; 3.3 Quiescent Consistency; 3.3.1 Remarks; 3.4 Sequential Consistency; 3.4.1 Remarks; 3.5 Linearizability; 3.5.1 Linearization Points; 3.5.2 Remarks; 3.6 Formal Definitions; 3.6.1 Linearizability
  • 3.6.2 Compositional Linearizability3.6.3 The Nonblocking Property; 3.7 Progress Conditions; 3.7.1 Dependent Progress Conditions; 3.8 The Java Memory Model; 3.8.1 Locks and Synchronized Blocks; 3.8.2 Volatile Fields; 3.8.3 Final Fields; 3.9 Remarks; 3.10 Chapter Notes; 3.11 Exercises; 4 Foundations of Shared Memory; 4.1 The Space of Registers; 4.2 Register Constructions; 4.2.1 MRSW Safe Registers; 4.2.2 A Regular Boolean MRSW Register; 4.2.3 A Regular M-Valued MRSW Register; 4.2.4 An Atomic SRSW Register; 4.2.5 An Atomic MRSW Register; 4.2.6 An Atomic MRMW Register; 4.3 Atomic Snapshots
  • 4.3.1 An Obstruction-Free Snapshot4.3.2 A Wait-Free Snapshot; 4.3.3 Correctness Arguments; 4.4 Chapter Notes; 4.5 Exercises; 5 The Relative Power of Primitive Synchronization Operations; 5.1 Consensus Numbers; 5.1.1 States and Valence; 5.2 Atomic Registers; 5.3 Consensus Protocols; 5.4 FIFO Queues; 5.5 Multiple Assignment Objects; 5.6 Read-Modify-Write Operations; 5.7 Common2 RMW Operations; 5.8 The compareAndSet() Operation; 5.9 Chapter Notes; 5.10 Exercises; 6 Universality of Consensus; 6.1 Introduction; 6.2 Universality; 6.3 A Lock-Free Universal Construction
  • 6.4 A Wait-Free Universal Construction6.5 Chapter Notes; 6.6 Exercises; IIPractice; 7 Spin Locks and Contention; 7.1 Welcome to the Real World; 7.2 Test-And-Set Locks; 7.3 TAS-Based Spin Locks Revisited; 7.4 Exponential Backoff; 7.5 Queue Locks; 7.5.1 Array-Based Locks; 7.5.2 The CLH Queue Lock; 7.5.3 The MCS Queue Lock; 7.6 A Queue Lock with Timeouts; 7.7 A Composite Lock; 7.7.1 A Fast-Path Composite Lock; 7.8 Hierarchical Locks; 7.8.1 A Hierarchical Backoff Lock; 7.8.2 A Hierarchical CLH Queue Lock; 7.9 One Lock To Rule Them All; 7.10 Chapter Notes; 7.11 Exercises

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