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Three-dimensional integrated circuit design /

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Pavlidis, Vasilis F., 1976-
Otros Autores: Friedman, Eby G.
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Burlington, MA : Morgan Kaufmann, ©2009.
Colección:Morgan Kaufmann series in systems on silicon.
Temas:
Acceso en línea:Texto completo (Requiere registro previo con correo institucional)

MARC

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100 1 |a Pavlidis, Vasilis F.,  |d 1976- 
245 1 0 |a Three-dimensional integrated circuit design /  |c Vasilis F. Pavlidis, Eby G. Friedman. 
246 3 |a 3D integrated circuit design 
246 3 |a 3 D integrated circuit design 
260 |a Burlington, MA :  |b Morgan Kaufmann,  |c ©2009. 
300 |a 1 online resource (xiii, 309 pages) :  |b illustrations. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a Systems on silicon 
588 0 |a Print version record. 
504 |a Includes bibliographical references (pages 289-303) and index. 
505 0 |a Cover13; -- Three-Dimensional Integrated Circuit Design -- Copyright Page -- Dedication Page -- Contents -- Preface -- Acknowledgments -- Chapter 1: Introduction -- Chapter 2: Manufacturing of 3-D Packaged Systems -- Chapter 3: 3-D Integrated Circuit Fabrication Technologies -- Chapter 4: Interconnect Prediction Models -- Chapter 5: Physical Design Techniques for 3-D ICs -- Chapter 6: Thermal Management Techniques -- Chapter 7: Timing Optimization for Two-Terminal Interconnects -- Chapter 8: Timing Optimization for Multiterminal Interconnects -- Chapter 9: 3-D Circuit Architectures -- Chapter 10: Case Study -- Chapter 11: Conclusions -- Appendix A: Enumeration of Gate Pairs in a 3-D IC -- Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multiterminal Nets -- References -- Index. 
590 |a O'Reilly  |b O'Reilly Online Learning: Academic/Public Library Edition 
650 0 |a Integrated circuits  |x Design and construction. 
650 6 |a Circuits intégrés  |x Conception et construction. 
650 7 |a Integrated circuits  |x Design and construction  |2 fast 
700 1 |a Friedman, Eby G. 
776 0 8 |i Print version:  |a Pavlidis, Vasilis F., 1976-  |t Three-dimensional integrated circuit design.  |d Amsterdam ; Boston : Morgan Kaufmann, ©2009  |z 9780123743435  |w (DLC) 2008301310  |w (OCoLC)228364680 
830 0 |a Morgan Kaufmann series in systems on silicon. 
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