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20231017213018.0 |
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m o d |
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cr unu|||||||| |
008 |
120712s2009 maua ob 001 0 eng d |
040 |
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|a UMI
|b eng
|e pn
|c UMI
|d OCLCQ
|d DEBSZ
|d IDEBK
|d OCLCQ
|d OCLCF
|d OCLCQ
|d CEF
|d OCLCO
|d OCLCQ
|d OCLCO
|
019 |
|
|
|a 733733249
|a 816570540
|a 823124318
|a 823847178
|a 823917047
|a 824101265
|a 824159150
|
020 |
|
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|a 0123743435
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020 |
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|a 9780123743435
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020 |
|
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|a 1282711393
|
020 |
|
|
|a 9781282711396
|
020 |
|
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|z 9780123743435
|q (hbk.)
|
029 |
1 |
|
|a AU@
|b 000049903960
|
029 |
1 |
|
|a DEBBG
|b BV040900665
|
029 |
1 |
|
|a DEBSZ
|b 378275666
|
029 |
1 |
|
|a DEBSZ
|b 381366936
|
035 |
|
|
|a (OCoLC)798922720
|z (OCoLC)733733249
|z (OCoLC)816570540
|z (OCoLC)823124318
|z (OCoLC)823847178
|z (OCoLC)823917047
|z (OCoLC)824101265
|z (OCoLC)824159150
|
037 |
|
|
|a CL0500000150
|b Safari Books Online
|
050 |
|
4 |
|a TK7874
|b .P398 2009
|
072 |
|
7 |
|a TJFC
|2 bicssc
|
082 |
0 |
4 |
|a 621.3815
|
049 |
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|a UAMI
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100 |
1 |
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|a Pavlidis, Vasilis F.,
|d 1976-
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245 |
1 |
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|a Three-dimensional integrated circuit design /
|c Vasilis F. Pavlidis, Eby G. Friedman.
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|a 3D integrated circuit design
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246 |
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|a 3 D integrated circuit design
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|a Burlington, MA :
|b Morgan Kaufmann,
|c ©2009.
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|a 1 online resource (xiii, 309 pages) :
|b illustrations.
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336 |
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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490 |
1 |
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|a Systems on silicon
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0 |
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|a Print version record.
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|a Includes bibliographical references (pages 289-303) and index.
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|a Cover13; -- Three-Dimensional Integrated Circuit Design -- Copyright Page -- Dedication Page -- Contents -- Preface -- Acknowledgments -- Chapter 1: Introduction -- Chapter 2: Manufacturing of 3-D Packaged Systems -- Chapter 3: 3-D Integrated Circuit Fabrication Technologies -- Chapter 4: Interconnect Prediction Models -- Chapter 5: Physical Design Techniques for 3-D ICs -- Chapter 6: Thermal Management Techniques -- Chapter 7: Timing Optimization for Two-Terminal Interconnects -- Chapter 8: Timing Optimization for Multiterminal Interconnects -- Chapter 9: 3-D Circuit Architectures -- Chapter 10: Case Study -- Chapter 11: Conclusions -- Appendix A: Enumeration of Gate Pairs in a 3-D IC -- Appendix B: Formal Proof of Optimum Single Via Placement -- Appendix C: Proof of the Two-terminal Via Placement Heuristic -- Appendix D: Proof of Condition for Via Placement of Multiterminal Nets -- References -- Index.
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590 |
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|a O'Reilly
|b O'Reilly Online Learning: Academic/Public Library Edition
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650 |
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|a Integrated circuits
|x Design and construction.
|
650 |
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6 |
|a Circuits intégrés
|x Conception et construction.
|
650 |
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7 |
|a Integrated circuits
|x Design and construction
|2 fast
|
700 |
1 |
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|a Friedman, Eby G.
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776 |
0 |
8 |
|i Print version:
|a Pavlidis, Vasilis F., 1976-
|t Three-dimensional integrated circuit design.
|d Amsterdam ; Boston : Morgan Kaufmann, ©2009
|z 9780123743435
|w (DLC) 2008301310
|w (OCoLC)228364680
|
830 |
|
0 |
|a Morgan Kaufmann series in systems on silicon.
|
856 |
4 |
0 |
|u https://learning.oreilly.com/library/view/~/9780123743435/?ar
|z Texto completo (Requiere registro previo con correo institucional)
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938 |
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|a ProQuest MyiLibrary Digital eBook Collection
|b IDEB
|n 271139
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994 |
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|a 92
|b IZTAP
|