Cargando…

Electronic design automation : synthesis, verification, and test /

This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the...

Descripción completa

Detalles Bibliográficos
Clasificación:Libro Electrónico
Otros Autores: Wang, Laung-Terng, Chang, Yao-Wen, Cheng, Kwang-Ting, 1961-
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Burlington, MA : Morgan Kaufmann Publishers/Elsevier, 2009.
Colección:Morgan Kaufmann series in systems on silicon.
Temas:
Acceso en línea:Texto completo (Requiere registro previo con correo institucional)

MARC

LEADER 00000cam a2200000 a 4500
001 OR_ocn528581481
003 OCoLC
005 20231017213018.0
006 m o d
007 cr cn|||||||||
008 100225s2009 mau ob 001 0 eng d
040 |a OPELS  |b eng  |e pn  |c OPELS  |d OCLCQ  |d B24X7  |d UMI  |d OCLCQ  |d DEBSZ  |d OCLCQ  |d OCLCF  |d OCLCQ  |d D6H  |d CEF  |d WYU  |d LEAUB  |d AU@  |d OL$  |d OCLCO  |d OCLCQ 
019 |a 798947783  |a 1062855836  |a 1102537772 
020 |a 9780123743640  |q (hardcover) 
020 |a 0123743648  |q (hardcover) 
029 1 |a AU@  |b 000045964135 
029 1 |a AU@  |b 000048788530 
029 1 |a CHNEW  |b 001009513 
029 1 |a DEBBG  |b BV040900666 
029 1 |a DEBBG  |b BV042300669 
029 1 |a DEBSZ  |b 367744694 
029 1 |a DEBSZ  |b 378275674 
029 1 |a DEBSZ  |b 381366944 
029 1 |a GBVCP  |b 78536269X 
029 1 |a NZ1  |b 15187728 
029 1 |a NZ1  |b 15619873 
035 |a (OCoLC)528581481  |z (OCoLC)798947783  |z (OCoLC)1062855836  |z (OCoLC)1102537772 
037 |a 153199:153357  |b Elsevier Science & Technology  |n http://www.sciencedirect.com 
050 4 |a TK7867  |b .E4227 2009 
082 0 4 |a 621.39/5  |2 22 
049 |a UAMI 
245 0 0 |a Electronic design automation :  |b synthesis, verification, and test /  |c edited by Laung-Terng Wang, Yao-Wen Chang, Kwang-Ting (Tim) Cheng. 
260 |a Burlington, MA :  |b Morgan Kaufmann Publishers/Elsevier,  |c 2009. 
300 |a 1 online resource 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a The Morgan Kaufmann series in systems on silicon 
520 |a This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book. Covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verification, physical design, and test - helps EDA newcomers to get "up-and-running" quickly Includes comprehensive coverage of EDA concepts, principles, data structures, algorithms, and architectures - helps all readers improve their VLSI design competence Contains latest advancements not yet available in other books, including Test compression, ESL design modeling, large-scale floorplanning, placement, routing, synthesis of clock and power/ground networks - helps readers to design/develop testable chips or products Includes industry best-practices wherever appropriate in most chapters - helps readers avoid costly mistakes 
505 0 |a Ch. 1. Introduction / Charles E. Stroud, Lang-Terng Wang and Yao-Wen Chang -- Ch. 2. Fundamentals of CMOS design / Xinghao Chen and Nur A. Touba -- Ch. 3. Design for testability / Laung-Terng Wang -- Ch. 4. Fundamentals of algorithms / Chung-Yang Huang, Chao-Yue Lai and Kwang-Ting Cheng -- Ch. 5. Electronic system-level design and high-level synthesis / Jianwen Zhu and Nikil Dutt -- Ch. 6. Logic synthesis in a nutshell / Jie-Hong Jiang and Srinivas Devadas -- Ch. 7. Test synthesis / Laung-Terng Wang, Xiaoqing Wen and Shianling Wu -- Ch. 8. Logic and circuit simulation / Jiun-Lang Huang, Cheng-Kok Koh and Stephen F. Cauley -- Ch. 9. Functional verification / Hung-Pin Wen, Li-C. Wang and Kwang-Ting Cheng -- Ch. 10. Floorplanning / Tung-Chieh Chen and Yao-Wen Chang -- Ch. 11. Placement / Chris Chu -- Ch. 12. Global and detailed routing / Huang-Yu Chen and Yao-Wen Chang -- Ch. 13. Synthesis of clock ad power/ground networks / Cheng-Kok Koh, Jitesh Jain and Stephen F. Cauley. 
505 8 |a Ch. 14. Fault Simulation and Test Generation / James C.-M. Li and Michael S. Hsiao. 
588 0 |a Print version record. 
504 |a Includes bibliographical references and index. 
590 |a O'Reilly  |b O'Reilly Online Learning: Academic/Public Library Edition 
650 0 |a Electronic circuit design  |x Data processing. 
650 0 |a Computer-aided design. 
650 2 |a Computer-Aided Design 
650 6 |a Conception assistée par ordinateur. 
650 7 |a computer-aided designs (visual works)  |2 aat 
650 7 |a Computer-aided design.  |2 fast  |0 (OCoLC)fst00872701 
650 7 |a Electronic circuit design  |x Data processing.  |2 fast  |0 (OCoLC)fst00906866 
700 1 |a Wang, Laung-Terng. 
700 1 |a Chang, Yao-Wen. 
700 1 |a Cheng, Kwang-Ting,  |d 1961- 
776 0 8 |i Print version:  |t Electronic design automation.  |d Burlington, MA : Morgan Kaufmann Publishers/Elsevier, 2009  |z 9780123743640  |z 0123743648  |w (DLC) 2008041788  |w (OCoLC)352339170 
830 0 |a Morgan Kaufmann series in systems on silicon. 
856 4 0 |u https://learning.oreilly.com/library/view/~/9780123743640/?ar  |z Texto completo (Requiere registro previo con correo institucional) 
938 |a Books 24x7  |b B247  |n bke00037190 
994 |a 92  |b IZTAP