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System performance tuning /
System Performance Tuning answers one of the most fundamental questions you can ask about your computer: How can I get it to do more work without buying more hardware? In the current economic downturn, performance tuning takes on a new importance. It allows system administrators to make the best use...
| Clasificación: | Libro Electrónico |
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| Autor principal: | |
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Sebastopol, CA ; Farnham :
O'Reilly,
2002.
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| Edición: | 2nd ed. |
| Colección: | Nutshell handbook.
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| Temas: | |
| Acceso en línea: | Texto completo (Requiere registro previo con correo institucional) |
Tabla de Contenidos:
- Table of Contents; Preface; Who Should Buy This Book?; A Note on Coverage; How to Read This Book; This Book as a Story; This Book as a Reference; Organization; Typographic Conventions; Comments and Questions; Personal Comments and Acknowledgments; Acknowledgments from Mike Loukides; An Introduction to Performance Tuning; An Introduction to Computer Architecture; Levels of Transformation; Software: algorithms and languages; The Instruction Set Architecture; Hardware: microarchitecture, circuits, and devices; The von Neumann Model; Caches and the Memory Hierarchy
- The Benefits of a 64-Bit ArchitectureWhat does it mean to be 64-bit?; Performance ramifications; Principles of Performance Tuning; Principle 0: Understand Your Environment; Principle 1: TANSTAAFL!; Principle 2: Throughput Versus Latency; Principle 3: Do Not Overutilize a Resource; Principle 4: Design Tests Carefully; Static Performance Tuning; Other Miscellaneous Things to Check; Concluding Thoughts; Workflow Management; Workflow Characterization; Simple Commands; Process Accounting; Enabling process accounting; Reviewing accounting records; Automating sar; Enabling sar; Retrieving data
- Virtual AdrianNetwork Pattern Analysis; Pattern 1: request-response; Pattern 1B: inverse request-response; Pattern 2: data transfer; Pattern 3: message passing; Packet size distributions; Workload Control; Education; Usage and performance agreements; The maxusers and the pt_cnt Parameters; Limiting Users; Quotas; Environmental limits; Complex Environments; Benchmarking; MIPS and Megaflops; MIPS; Megaflops; Component-Specific Benchmarks; Linpack; SPECint and SPECfp; Commercial Workload Benchmarks; TPC; SPECweb99; User Benchmarks; Choose your problem set; Choose your runtime; Automate heavily
- Set benchmark runtime rulesConcluding Thoughts; Processors; Microprocessor Architecture; Clock Rates; Pipelining; Variable-length instructions; Branches; The Second Generation of RISC Processor Design; Caching; The Cache Hierarchy; Cache Organization and Operation; Associativity; Locality and "Cache-Busters"; Unit stride; Linked lists; Cache-aligned block copy problems; The Cache Size Anomaly; Process Scheduling; The System V Model: The Linux Model; Finding a process's priority; Adjusting a process's effective priority; Modifications for SMP systems
- Multilayered Scheduling Classes: The Solaris ModelThe Solaris threading model; Scheduling classes; The dispatcher; Checking a process's priority; Tuning the dispatch tables; Adjusting priorities; Multiprocessing; Processor Communication; Buses; Crossbars; UltraSPARC-III systems: Fireplane; "Interconnectionless" architectures; Operating System Multiprocessing; Threads; Locking; Cache Influences on Multiprocessor Performance; Peripheral Interconnects; SBus; Clock speed; Burst transfer size; Transfer mode; Summary of SBus implementations; SBus card utilization; PCI; PCI bus transactions