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Networks on chips : technology and tools /
The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and sto...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Amsterdam ; Boston :
Elsevier Morgan Kaufmann Publishers,
©2006.
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| Colección: | Morgan Kaufmann series in systems on silicon.
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| Temas: | |
| Acceso en línea: | Texto completo (Requiere registro previo con correo institucional) |
MARC
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| 100 | 1 | |a Benini, Luca, |d 1967- | |
| 245 | 1 | 0 | |a Networks on chips : |b technology and tools / |c Luca Benini and Giovanni De Micheli. |
| 260 | |a Amsterdam ; |a Boston : |b Elsevier Morgan Kaufmann Publishers, |c ©2006. | ||
| 300 | |a 1 online resource (x, 395 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a The Morgan Kaufmann series in systems on silicon | |
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a Networks on chip -- Network architecture : principles and examples -- Physical network layer -- The data-link layer in NoC design -- Network and transport layers in networks on chip -- Network interface architecture and design issues -- NoC programming -- Design methodologies and CAD tool flows for NoCs -- Designs and implementations of NoC-based SoCs. | |
| 520 | |a The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs. | ||
| 588 | 0 | |a Print version record. | |
| 546 | |a English. | ||
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| 650 | 0 | |a Systems on a chip. | |
| 650 | 0 | |a Computer networks |x Equipment and supplies. | |
| 650 | 6 | |a Systèmes sur une puce. | |
| 650 | 6 | |a Réseaux d'ordinateurs |x Appareils et matériel. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x Integrated. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x General. |2 bisacsh | |
| 650 | 7 | |a Systems on a chip. |2 blmlsh | |
| 650 | 7 | |a Computer networks |x Equipment and supplies. |2 blmlsh | |
| 650 | 7 | |a Networks on a chip |x Congresses. |2 blmlsh | |
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| 650 | 7 | |a Systems on a chip |2 fast | |
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| 700 | 1 | |a De Micheli, Giovanni. | |
| 776 | 0 | 8 | |i Print version: |a Benini, Luca, 1967- |t Networks on chips. |d Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, ©2006 |z 0123705215 |z 9780123705211 |w (DLC) 2006018657 |w (OCoLC)70054285 |
| 830 | 0 | |a Morgan Kaufmann series in systems on silicon. | |
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