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Digital system clocking : high performance and low-power aspects /
Provides the only up-to-date source on the most recent advances in this often complex and fascinating topic. . The only book to be entirely devoted to clocking. Clocking has become one of the most important topics in the field of digital system design. A "must have" book for advanced circu...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , , , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York : Hoboken, N.J. :
IEEE ; Wiley-Interscience,
©2003.
|
| Temas: | |
| Acceso en línea: | Texto completo (Requiere registro previo con correo institucional) |
MARC
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| 245 | 0 | 0 | |a Digital system clocking : |b high performance and low-power aspects / |c Vojin G. Oklobdzjja, Vladlmlr M. Stojanovic, Dejan M. Markovic, Nikola M. Nedovic. |
| 260 | |a New York : |b IEEE ; |a Hoboken, N.J. : |b Wiley-Interscience, |c ©2003. | ||
| 300 | |a 1 online resource (xv, 245 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 504 | |a Includes bibliographical references (pages 233-240) and index. | ||
| 505 | 0 | 0 | |g Chapter 1. |t Introduction. |g 1.1. |t Clocking in Synchronous Systems. |g 1.2. |t System Clock Design. |g 1.3. |t Timing Parameters. |g 1.4. |t Clock Signal Distribution -- |g Chapter 2. |t Theory of Clocked Storage Elements. |g 2.1. |t Latch-Based Clocked Storage Elements. |g 2.2. |t Flip-Flop -- |g Chapter 3. |t Timing and Energy Parameters. |g 3.1. |t Timing Parameters. |g 3.2. |t Energy Parameters. |g 3.3. |t Interface with Clock Network and Combinational Logic -- |g Chapter 4. |t Pipelining and Timing Analysis. |g 4.1. |t Analysis of a System that Uses a Flip-Flop. |g 4.2. |t Analysis of a System that Uses a Single Latch. |g 4.3. |t Analysis of a System with a Two-Phase Clock and Two Latches in an M-S Arrangement. |g 4.4. |t Analysis of a System with a Single-Phase Clock and Dual-Edge-Triggered Storage Elements -- |g Chapter 5. |t High-Performance System Issues. |g 5.1. |t Absorbing Clock Uncertainties. |g 5.2. |t Time Borrowing. |g 5.3. |t Time Borrowing and Clock Uncertainty -- |g Chapter 6. |t Low-Energy System Issues. |g 6.1. |t Low-Swing Circuit Techniques. |g 6.2. |t Clock Gating. |g 6.3. |t Dual-Edge Triggering. |g 6.4. |t Glitch Robust Design -- |g Chapter. |t 7 Simulation Techniques. |g 7.1. |t The Method of Logical Effort. |g 7.2. |t Environment Setup. |g 7.3. |t Appendix -- |g Chapter 8. |t State-of-the-Art Clocked Storage Elements in CMOS Technology. |g 8.1. |t Master-Slave Latch Examples. |g 8.2. |t Flip-Flop Examples. |g 8.3. |t Clocked Storage Elements with Local Clock Gating. |g 8.4. |t Low-Swing Clock Storage Elements. |g 8.5. |t Dual-Edgc-Triggered Clocked Storage Elements. |g 8.6. |t Summary -- |g Chapter 9. |t Microprocessor Examples. |g 9.1. |t Clocking for Intel Microprocessors. |g 9.2. |t Sun Microsystems Ultrasparc-III Clocking. |g 9.3. |t Alpha Clocking: A Historical Overview. |g 9.4. |t Clocked Storage Elements in IBM Processors. |
| 588 | 0 | |a Print version record and online resource. | |
| 520 | |a Provides the only up-to-date source on the most recent advances in this often complex and fascinating topic. . The only book to be entirely devoted to clocking. Clocking has become one of the most important topics in the field of digital system design. A "must have" book for advanced circuit engineers | ||
| 590 | |a O'Reilly |b O'Reilly Online Learning: Academic/Public Library Edition | ||
| 650 | 0 | |a Timing circuits |x Design and construction. | |
| 650 | 0 | |a Memory management (Computer science) | |
| 650 | 0 | |a Low voltage integrated circuits |x Design and construction. | |
| 650 | 0 | |a High performance computing. | |
| 650 | 0 | |a Electronic digital computers |x Power supply. | |
| 650 | 0 | |a Electric power |x Conservation. | |
| 650 | 6 | |a Gestion mémoire (Informatique) | |
| 650 | 6 | |a Superinformatique. | |
| 650 | 6 | |a Ordinateurs |x Alimentation en énergie. | |
| 650 | 6 | |a Électricité |x Conservation. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x Integrated. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x General. |2 bisacsh | |
| 650 | 7 | |a Timing circuits |x Design and construction. |2 fast |0 (OCoLC)fst01151227 | |
| 650 | 7 | |a Memory management (Computer science) |2 fast |0 (OCoLC)fst01015971 | |
| 650 | 7 | |a Low voltage integrated circuits |x Design and construction. |2 fast |0 (OCoLC)fst01003180 | |
| 650 | 7 | |a High performance computing. |2 fast |0 (OCoLC)fst00956032 | |
| 650 | 7 | |a Electronic digital computers |x Power supply. |2 fast |0 (OCoLC)fst00907159 | |
| 650 | 7 | |a Electric power |x Conservation. |2 fast |0 (OCoLC)fst00905360 | |
| 653 | |a Electrical and Electronics Engineering. | ||
| 700 | 1 | |a Oklobdzija, Vojin G., |e author. | |
| 700 | 1 | |a Stojanovic, Vladlmlr M., |e author. | |
| 700 | 1 | |a Markovic, Dejan M., |e author. | |
| 700 | 1 | |a Nedovic, Nikola M., |e author. | |
| 776 | 0 | 8 | |i Print version: |t Digital system clocking. |d New York : IEEE ; Hoboken, N.J. : Wiley-Interscience, ©2003 |z 047127447X |w (DLC) 2002031140 |w (OCoLC)50315077 |
| 856 | 4 | 0 | |u https://learning.oreilly.com/library/view/~/9780471274476/?ar |z Texto completo (Requiere registro previo con correo institucional) |
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