Verilog coding for logic synthesis /

A practical introduction to writing synthesizable Verilog code Rapid change in IC chip complexity and the pressure to design more complex IC chips at a faster pace has forced design engineers to find a more efficient and productive method to create schematics with large amounts of logic gates. This...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Lee, Weng Fook
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Hoboken, N.J. : Wiley-Interscience, ©2003.
Temas:
Digital electronics.
Logic circuits > Computer-aided design.
Verilog (Computer hardware description language)
Électronique numérique.
Circuits logiques > Conception assistée par ordinateur.
Verilog (Langage de description de matériel informatique)
Digital electronics
Logic circuits > Computer-aided design
Electrical and Electronics Engineering.
FACsci
ER > Internet > Book > Full text
Acceso en línea:Texto completo (Requiere registro previo con correo institucional)
Tabla de Contenidos:
  • Introduction
  • Asic design flow
  • Verilog coding
  • Coding style : best-known method for synthesis
  • Design example of programmable timer
  • Design example of programmable logic block for peripheral interface.

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