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110608s2011 nyua fob 001 0 eng d |
| 010 |
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|z 2007019390
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| 020 |
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|a 0071549234
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| 020 |
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|z 0071493751 (print)
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| 020 |
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|a 9780071493758
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| 050 |
|
4 |
|a TK7872.P38
|b B475 2007
|
| 082 |
0 |
4 |
|a 621.3815/364
|2 22
|
| 100 |
1 |
|
|a Best, Roland E.
|
| 245 |
1 |
0 |
|a Phase-locked loops
|h [electronic resource] :
|b design, simulation, and applications /
|c Roland E. Best.
|
| 250 |
|
|
|a 6th ed.
|
| 260 |
|
|
|a New York :
|b McGraw-Hill,
|c [2011]
|
| 300 |
|
|
|a 1 electronic text (xii, 490 p.) :
|b ill.
|
| 490 |
1 |
|
|a McGraw-Hill's AccessEngineering
|
| 500 |
|
|
|a Print version c2007.
|
| 504 |
|
|
|a Includes bibliographical references (p. 473-475) and index.
|
| 505 |
0 |
|
|u http://www.loc.gov/catdir/toc/ecip0717/2007019390.html
|
| 530 |
|
|
|a Also issued in print and PDF versions.
|
| 545 |
0 |
|
|a Contributor biographical information
|u http://www.loc.gov/catdir/enhancements/fy0726/2007019390-b.html
|
| 588 |
|
|
|a Description based on cover image and table of contents, viewed on June 8, 2011.
|
| 650 |
|
0 |
|a Phase-locked loops.
|
| 655 |
|
0 |
|a Electronic books.
|
| 655 |
|
0 |
|a Internet resources.
|
| 740 |
0 |
2 |
|a Introduction to PLLS.
|
| 740 |
0 |
2 |
|a Mixed-signal PLL building blocks.
|
| 740 |
0 |
2 |
|a Mixed-signal analysis.
|
| 740 |
0 |
2 |
|a PLL performance in the presence of noise.
|
| 740 |
0 |
2 |
|a Design procedure for mixed-signal PLL.
|
| 740 |
0 |
2 |
|a Mixed-signal PLL applications part 1: integer-n frequency synthesizers.
|
| 740 |
0 |
2 |
|a Mixed-signal PLL applications part 2: fractional-n frequency synthesizers.
|
| 740 |
0 |
2 |
|a Mixed-signal PLL applications part 3: miscellaneous applications.
|
| 740 |
0 |
2 |
|a Higher-order loops.
|
| 740 |
0 |
2 |
|a Computer-aided design and simulation of mixed-signal PLLS.
|
| 740 |
0 |
2 |
|a All-digital PLLS (ADPLLS).
|
| 740 |
0 |
2 |
|a Computer-aided design and simulation of ADPLLS.
|
| 740 |
0 |
2 |
|a Software PLL (SPLL).
|
| 740 |
0 |
2 |
|a PLL in communications.
|
| 740 |
0 |
2 |
|a Searching PLL integrated circuits.
|
| 740 |
0 |
2 |
|a Pull-in process.
|
| 740 |
0 |
2 |
|a Laplace transform.
|
| 740 |
0 |
2 |
|a Digital filter basics.
|
| 740 |
0 |
2 |
|a Measuring PLL parameters.
|
| 830 |
|
0 |
|a McGraw-Hill's AccessEngineering.
|
| 856 |
4 |
0 |
|u https://accessengineeringlibrary.uam.elogim.com/content/book/9780071493758
|z Texto completo
|
| 997 |
|
|
|a (c)2011 Cassidy Cataloguing Services, Inc.
|
