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KNOVEL_on1227392889 |
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20231027140348.0 |
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201219t20202021enka ob 001 0 eng d |
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|a EBLCP
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|d OCLCO
|d OCLCQ
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|a 1243109416
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|a 1839533072
|q electronic bk.
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|a 9781839533075
|q (electronic bk.)
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|z 9781839533068
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|z 1839533064
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024 |
7 |
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|a 10.1049/PBCS076E
|2 doi
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|a AU@
|b 000068796944
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|a (OCoLC)1227392889
|z (OCoLC)1243109416
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|a 621.367
|2 23
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049 |
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|a UAMI
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100 |
1 |
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|a Sengupta, Anirban
|c (Computer scientist),
|e author.
|
245 |
1 |
0 |
|a Secured Hardware Accelerators for DSP and Image Processing Applications
|c Anirban Sengupta
|
264 |
|
1 |
|a Stevenage
|b The Institution of Engineering and Technology
|c 2020
|
264 |
|
4 |
|c ©2021
|
300 |
|
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|a 1 online resource (xl, 364 pages)
|b illustrations
|
336 |
|
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|a text
|b txt
|2 rdacontent
|
337 |
|
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|a computer
|b c
|2 rdamedia
|
338 |
|
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|a online resource
|b cr
|2 rdacarrier
|
490 |
1 |
|
|a IET materials, circuits and devices series
|v 76
|
588 |
|
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|a Description based on online resource; title from PDF title page (IET Digital Library, viewed on October 15, 2021)
|
504 |
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|a Includes bibliographical references and index
|
505 |
0 |
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|a Introduction : secured and optimized hardware accelerators for DSP and image processing applications / Anirban Sengupta -- Cryptography-driven IP steganography for DSP hardware accelerators / Anirban Sengupta -- Double line of defence to secure JPEG codec hardware for medical imaging systems / Anirban Sengupta -- Integrating multi-key-based structural obfuscation and low-level watermarking for double line of defence of DSP hardware accelerators / Anirban Sengupta -- Multimodal hardware accelerators for image processing filters / Anirban Sengupta -- Fingerprint biometric for securing hardware accelerators / Anirban Sengupta -- Key-triggered hash-chaining-based encoded hardware steganography for securing DSP hardware accelerators / Anirban Sengupta -- Designing a secured N-point DFT hardware accelerator using obfuscation and steganography / Anirban Sengupta and Mahendra Rathor -- Structural transformation-based obfuscation using pseudo-operation mixing for securing data-intensive IP cores / Anirban Sengupta and Mahendra Rathor
|
500 |
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|a Written by an acknowledged expert in the field, this book focuses on approaches for designing secure hardware accelerators for digital signal processing and image processing. State-of-the art security and optimization algorithms are presented, and their roles in the design of secured hardware accelerators explored
|
520 |
|
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|a This book presents state-of-the art security solutions and optimization algorithms employed for designing secured hardware accelerators for DSP, multimedia and image processing applications. Broadly, the theme of this book includes the following: secured and optimized hardware accelerators for DSP and image processing applications; cryptography-driven IP steganography for DSP hardware accelerators; double line of defence to secure JPEG codec hardware for medical imaging systems; integrating multi-key-based structural obfuscation and low-level watermarking for double line of defence of DSP hardware accelerators; multimodal hardware accelerators for image processing filters; fingerprint biometric for securing hardware accelerators; key-triggered hash-chaining-based encoded hardware steganography for securing DSP hardware accelerators; N-point DFT hardware accelerator design using obfuscation and steganography; and structural transformation and obfuscation frameworks for data-intensive IPs.
|
590 |
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|a Knovel
|b ACADEMIC - Software Engineering
|
590 |
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|a Knovel
|b ACADEMIC - Computer Hardware Engineering
|
650 |
|
0 |
|a Image processing.
|
650 |
|
0 |
|a Imaging systems in medicine.
|
650 |
|
0 |
|a Particle accelerators.
|
650 |
|
0 |
|a Cryptography.
|
650 |
|
0 |
|a Public key cryptography.
|
650 |
|
2 |
|a Particle Accelerators
|
650 |
|
6 |
|a Traitement d'images.
|
650 |
|
6 |
|a Imagerie médicale.
|
650 |
|
6 |
|a Accélérateurs de particules.
|
650 |
|
6 |
|a Cryptographie.
|
650 |
|
6 |
|a Cryptographie à clé publique.
|
650 |
|
7 |
|a image processing.
|2 aat
|
650 |
|
7 |
|a Cryptography
|2 fast
|0 (OCoLC)fst00884552
|
650 |
|
7 |
|a Image processing
|2 fast
|0 (OCoLC)fst00967501
|
650 |
|
7 |
|a Imaging systems in medicine
|2 fast
|0 (OCoLC)fst00967628
|
650 |
|
7 |
|a Particle accelerators
|2 fast
|0 (OCoLC)fst01054042
|
650 |
|
7 |
|a Public key cryptography
|2 fast
|0 (OCoLC)fst01082562
|
650 |
|
7 |
|a codecs
|2 inspect
|
650 |
|
7 |
|a cryptography
|2 inspect
|
650 |
|
7 |
|a digital signal processing chips
|2 inspect
|
650 |
|
7 |
|a image processing
|2 inspect
|
650 |
|
7 |
|a multimedia computing
|2 inspect
|
650 |
|
7 |
|a steganography
|2 inspect
|
650 |
|
7 |
|a watermarking
|2 inspect
|
653 |
|
|
|a key-triggered hash-chaining-based encoded hardware steganography
|
653 |
|
|
|a fingerprint biometric
|
653 |
|
|
|a image processing filters
|
653 |
|
|
|a multimodal hardware accelerators
|
653 |
|
|
|a low-level watermarking
|
653 |
|
|
|a multikey-based structural obfuscation
|
653 |
|
|
|a medical imaging systems
|
653 |
|
|
|a JPEG codec hardware
|
653 |
|
|
|a cryptography-driven IP steganography
|
653 |
|
|
|a optimized hardware accelerators
|
653 |
|
|
|a multimedia hardware accelerators
|
653 |
|
|
|a image processing hardware accelerators
|
653 |
|
|
|a DSP
|
653 |
|
|
|a secured hardware accelerator design
|
776 |
0 |
8 |
|i Print version:
|a Sengupta, Anirban
|t Secured Hardware Accelerators for DSP and Image Processing Applications
|d Stevenage : Institution of Engineering & Technology,c2021
|z 9781839533068
|
830 |
|
0 |
|a Materials, circuits and devices series ;
|v 76.
|
856 |
4 |
0 |
|u https://appknovel.uam.elogim.com/kn/resources/kpSHADSPI2/toc
|z Texto completo
|
938 |
|
|
|a Askews and Holts Library Services
|b ASKH
|n AH37599206
|
938 |
|
|
|a ProQuest Ebook Central
|b EBLB
|n EBL6426642
|
938 |
|
|
|a EBSCOhost
|b EBSC
|n 2706963
|
994 |
|
|
|a 92
|b IZTAP
|