|
|
|
|
| LEADER |
00000cam a2200000Mu 4500 |
| 001 |
KNOVEL_ocn995766614 |
| 003 |
OCoLC |
| 005 |
20231027140348.0 |
| 006 |
m o d |
| 007 |
cr |n|---||||| |
| 008 |
170729s2017 mou ob 001 0 eng d |
| 040 |
|
|
|a EBLCP
|b eng
|e pn
|c EBLCP
|d IDB
|d OCLCQ
|d YDX
|d OCLCF
|d N$T
|d OPELS
|d UMI
|d STF
|d MERER
|d TOH
|d UPM
|d COO
|d D6H
|d KNOVL
|d GZM
|d MERUC
|d ESU
|d OCLCQ
|d U3W
|d LVT
|d LQU
|d OCLCQ
|d S2H
|d OCLCO
|d COM
|d OCLCQ
|d SFB
|d OCLCQ
|d OCLCO
|
| 019 |
|
|
|a 994205704
|a 994314883
|a 994934172
|a 998839047
|a 1002112847
|a 1002456791
|a 1006305858
|a 1027973079
|a 1031944897
|a 1105195972
|a 1105564314
|a 1311350135
|
| 020 |
|
|
|a 9780081017654
|
| 020 |
|
|
|a 0081017650
|
| 020 |
|
|
|z 9780081017647
|
| 020 |
|
|
|z 0081017642
|
| 029 |
1 |
|
|a AU@
|b 000061156517
|
| 029 |
1 |
|
|a CHBIS
|b 011069574
|
| 029 |
1 |
|
|a CHNEW
|b 001014447
|
| 029 |
1 |
|
|a CHVBK
|b 499775430
|
| 029 |
1 |
|
|a GBVCP
|b 1004856210
|
| 029 |
1 |
|
|a GBVCP
|b 897845838
|
| 029 |
1 |
|
|a AU@
|b 000062899500
|
| 035 |
|
|
|a (OCoLC)995766614
|z (OCoLC)994205704
|z (OCoLC)994314883
|z (OCoLC)994934172
|z (OCoLC)998839047
|z (OCoLC)1002112847
|z (OCoLC)1002456791
|z (OCoLC)1006305858
|z (OCoLC)1027973079
|z (OCoLC)1031944897
|z (OCoLC)1105195972
|z (OCoLC)1105564314
|z (OCoLC)1311350135
|
| 037 |
|
|
|a CL0500000880
|b Safari Books Online
|
| 050 |
|
4 |
|a TK7867
|b .W557 2017eb
|
| 072 |
|
7 |
|a TEC
|x 008010
|2 bisacsh
|
| 082 |
0 |
4 |
|a 621.3815
|
| 049 |
|
|
|a UAMI
|
| 100 |
1 |
|
|a Wilson, Peter.
|
| 245 |
1 |
4 |
|a The Circuit Designer's Companion.
|
| 250 |
|
|
|a 4th ed.
|
| 264 |
|
1 |
|a Saint Louis :
|b Elsevier Science,
|c 2017.
|
| 300 |
|
|
|a 1 online resource (498 pages)
|
| 336 |
|
|
|a text
|b txt
|2 rdacontent
|
| 337 |
|
|
|a computer
|b c
|2 rdamedia
|
| 338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|
| 588 |
0 |
|
|a Print version record.
|
| 505 |
0 |
|
|a Front Cover; The Circuit Designer's Companion; The Circuit Designer's Companion; Copyright; Contents; Introduction; INTRODUCTION TO THE FOURTH EDITION; INTRODUCTION TO THE THIRD EDITION; INTRODUCTION TO THE SECOND EDITION (TIM WILLIAMS,2004); INTRODUCTION TO THE FIRST EDITION (TIM WILLIAMS, 1990); 1 -- Grounding and Wiring; 1.1 GROUNDING; When to Consider Grounding?; 1.1.1 GROUNDING WITHIN ONE UNIT; 1.1.2 CHASSIS GROUND; 1.1.3 THE CONDUCTIVITY OF ALUMINUM; 1.1.4 GROUND LOOPS; 1.1.5 POWER SUPPLY RETURNS; Varying Loads; Power Rail Feed; Conductor Impedance; 1.1.6 INPUT SIGNAL GROUND.
|
| 505 |
8 |
|
|a Connection to 0V Elsewhere on the Printed Circuit BoardConnection to 0V Within the Unit; External Ground Connection; 1.1.7 OUTPUT SIGNAL GROUND; Avoiding the Common Impedance; 1.1.8 INTERBOARD INTERFACE SIGNALS; Partitioning the Signal Return; 1.1.9 STAR-POINT GROUNDING; 1.1.10 GROUND CONNECTIONS BETWEEN UNITS; Breaking the Ground Link; 1.1.11 SHIELDING; Which End to Ground for Low-Frequency Shielding?; Electrostatic Screening; Surface Transfer Impedance; 1.1.12 THE SAFETY EARTH; 1.2 WIRING AND CABLES; 1.2.1 WIRE TYPES; Wire Inductance; Equipment Wire; Wire-Wrap Wire; 1.2.2 CABLE TYPES.
|
| 505 |
8 |
|
|a 1.2.3 POWER CABLES1.2.4 DATA AND MULTICORE CABLES; Data Communication Cables; Structured Data Cable; Shielding and Microphony; 1.2.5 RADIO FREQUENCY CABLES; 1.2.6 TWISTED PAIR; 1.2.7 CROSS TALK; Digital Cross Talk; 1.3 TRANSMISSION LINES; Transmission Line Effects; Critical Lengths for Pulses; 1.3.1 CHARACTERISTIC IMPEDANCE; 1.3.2 TIME DOMAIN; Forward and Reflected Waves; Ringing; The Bergeron Diagram; The Uses of Mismatching; 1.3.3 FREQUENCY DOMAIN; Standing Wave Distribution Versus Frequency; Impedance Transformation; Lossy Lines; Understanding the Transmission Line Impedance Graphically.
|
| 505 |
8 |
|
|a 2 -- Printed Circuits2.1 BOARD TYPES; 2.1.1 MATERIALS; Epoxy Glass; 2.1.2 TYPE OF CONSTRUCTION; 2.1.3 CHOICE OF TYPE; 2.1.4 CHOICE OF SIZE; Subdivision Boundaries; Panelization; 2.1.5 HOW A MULTILAYER BOARD IS MADE; 2.2 DESIGN RULES; 2.2.1 TRACK WIDTH AND SPACING; Conductor Resistance; Voltage Breakdown and Cross Talk; Constant Impedance; 2.2.2 HOLE AND PAD SIZE; Vias; Through Hole Pads; Surface Mount Pads; 2.2.3 TRACK ROUTING; 2.2.4 GROUND AND POWER DISTRIBUTION; Ground Rail Inductance; Gridded Ground Layout; The Ground Plane; Inside or Outside Layers; Multiple Ground Planes.
|
| 505 |
8 |
|
|a 2.2.5 COPPER PLATING AND FINISHING2.2.6 SOLDER RESIST; Screen-Printed Resists; Photo-Imaged Film; 2.2.7 TERMINATIONS AND CONNECTIONS; Two-Part Connectors; Edge Connectors; 2.3 BOARD ASSEMBLY: SURFACE MOUNT AND THROUGH HOLE; 2.3.1 SURFACE MOUNT DESIGN RULES; Solder Process; Printed Circuit Board Quality; Thermal Stresses; Cleaning and Testing; 2.3.2 PACKAGE PLACEMENT; 2.3.3 COMPONENT IDENTIFICATION; Polarity Indication; Guarding; 2.3.4 UNDERSTANDING THERMAL BEHAVIOR; Thermal Conduction; Thermal Convection; Thermal Radiation; Thermal Capacity; Thermal Expansion; Thermal Shock; Thermal Cycling.
|
| 500 |
|
|
|a Solder Cracking.
|
| 504 |
|
|
|a Includes bibliographical references and index.
|
| 590 |
|
|
|a O'Reilly
|b O'Reilly Online Learning: Academic/Public Library Edition
|
| 590 |
|
|
|a Knovel
|b ACADEMIC - Computer Hardware Engineering
|
| 650 |
|
0 |
|a Electronic circuit design.
|
| 650 |
|
6 |
|a Circuits électroniques
|x Calcul.
|
| 650 |
|
7 |
|a TECHNOLOGY & ENGINEERING
|x Electronics
|x Circuits
|x General.
|2 bisacsh
|
| 650 |
|
7 |
|a Electronic circuit design
|2 fast
|
| 776 |
0 |
8 |
|i Print version:
|a Wilson, Peter.
|t Circuit Designer's Companion.
|d Saint Louis : Elsevier Science, ©2017
|z 9780081017647
|
| 856 |
4 |
0 |
|u https://appknovel.uam.elogim.com/kn/resources/kpCDCE0022/toc
|z Texto completo
|
| 938 |
|
|
|a EBL - Ebook Library
|b EBLB
|n EBL4917639
|
| 938 |
|
|
|a EBSCOhost
|b EBSC
|n 1465581
|
| 938 |
|
|
|a YBP Library Services
|b YANK
|n 14703981
|
| 994 |
|
|
|a 92
|b IZTAP
|
