Cargando…

Ultra clean processing of semiconductor surfaces XI : selected, peer reviewed papers from the 11th international symposium on ultra clean processing of semiconductor surfaces (UCPSS), September 17-19, 2012, Gent, Belgium /

This volume covers various aspects of ultra-clean technology for the large-scale integration of semiconductors. These include cleaning and contamination control in both front-end-of-line (FEOL) and back-end-of-line (BEOL) processing, as well as cleaning for semiconductor photo-voltaic applications....

Descripción completa

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: International Symposium on Ultra Clean Processing of Semiconductor Surfaces Ghent, Belgium
Otros Autores: Heyns, Marc, Mertens, Paul, Meuris, Marc
Formato: Electrónico Congresos, conferencias eBook
Idioma:Inglés
Publicado: Durnten-Zurich, Switzerland : Trans Tech Publications Ltd., [2013]
Colección:Diffusion and defect data. Solid state phenomena ; v. 195.
Temas:
Acceso en línea:Texto completo
Tabla de Contenidos:
  • Ultra Clean Processing of Semiconductor Surfaces XI; Preface, Committees and Acknowledgements; Table of Contents; Keynote; Silicon & beyond CMOS: The Path of Advanced Electronic Structure Engineering for Low-Voltage Transistors; Chapter 1: Cleaning for FEOL Applications; Cleaning Technology for Advanced Devices beyond 20 nm Node; Dummy Oxide Removal in High-K Last Process Integration how to Avoid Silicon Corrosion Issue; Implanted Photoresist Remover for Advanced Nodes Including SiGe, Ge and High K-Metals; Development of a Integrated Dry/Wet Hybrid Cleaning System.
  • New Chemical Vapor Delivery Systems for Surface CleaningRemoval of UV Cured Resin Using Hybrid Cleaning Method; Chapter 2: Wet Etching; Selective Nickel Silicide Wet Etchback Chemistry for Low Temperature Anneal Process; Wet Etching Behavior of Poly-Si in TMAH Solution; Novel Wet Etching of Silicon Nitride in a Single Wafer Spin Processor; Selective Nitride Etch by Using Fluorides in High Boiling Point Solvent; SiO2 Etch Rate Modification by Ion Implantation; Surface Preparations Impact on 248nm Deep UV Photo Resists Adhesion during a Wet Etch.
  • Chapter 3: Surface Chemistry and FunctionalisationChemical Control of Surfaces: From Fundamental Understanding to Practical Application; Surface Preparation of Poly-Si Using Dry Cleaning for Minimizing Interfacial Resistance; A Comparative Study for the Backside Illumination (BSI) Technology Using Bonding Wafer Cleaning Process for Advanced CMOS Image Sensor; Clean Process Mechanism of HKMG during N-PMOS Patterning; Study of Highly Selective and Sensitive Microarray Structure Based on Hydrophilic/Hydrophobic SAMs (Self-Assembled Monolayers); Evaluation of CD Fluctuation on QC Monitor.
  • In Situ Studies of III-V Surfaces and High-K Atomic Layer DepositionALD Growth Behavior of High-K Nanolayers on Various Substrates Characterized by X-Ray Spectrometry in Gracing Incidence Geometry; Cleaning of III-V Materials: Surface Chemistry Considerations; Chapter 4: Cleaning for BEOL and 3D Applications; Unique Size-Dependent Challenges for BEOL Cleans in the Patterning of Sub-20 nm Features; The Risk of Pattern Collapse for Structures in Future Logic Devices.
  • Determination of Surface Energy Characteristics of Plasma Processed Ultra Low-K Dielectrics for Optimized Wetting in Wet Chemical Plasma Etch Residue RemovalWet Removal of Post-Etch Residues by a Combination of UV Irradiation and a SC1 Process; Analysis of Oxidized Copper Surface and its Evolution; Introduction of a Dynamic Corrosion Inhibitor for Copper Interconnect Cleaning; Removing W Polymer Residue from BEOL Structures Using DSP+ (Dilute Sulfuric-Peroxide-HF) Mixture
  • A Case Study.